Datasheet > 935299315115

935299315115

更新时间： 2024-11-07 19:55:55

品牌	Logo	应用领域
恩智浦 - NXP		驱动输出元件逻辑集成电路
页数	文件大小	规格书
18页	219K
描述
LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PQCC20, 2.50 X 4.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT764-1, DHVQFN-20

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935299315115 技术参数

生命周期：	Transferred	包装说明：	HVQCCN,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.57	其他特性：	ALSO OPERATES AT 1.65 TO 3.6V SUPPLY
系列：	LVC/LCX/Z	JESD-30 代码：	R-PQCC-N20
长度：	4.5 mm	逻辑集成电路类型：	BUS DRIVER
位数：	8	功能数量：	1
端口数量：	2	端子数量：	20
最高工作温度：	125 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	HVQCCN
封装形状：	RECTANGULAR	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
传播延迟（tpd）：	18.8 ns	筛选级别：	AEC-Q100
座面最大高度：	1 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	1.2 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	AUTOMOTIVE	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	2.5 mm	Base Number Matches：	1

935299315115 数据手册

74LVC374A-Q100

Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive

edge-trigger; 3-state

Rev. 1 — 22 November 2012

Product data sheet

1. General description

The 74LVC374A-Q100 is an octal D-type flip-flop featuring separate D-type inputs for

each flip-flop and 3-state outputs for bus-oriented applications. A clock input (CP) and an

outputs enable input (OE) are common to all flip-flops.

The eight flip-flops store the state of their individual D-inputs that meet the set-up and hold

times requirements on the LOW to HIGH CP transition.

When pin OE is LOW, the contents of the eight flip-flops is available at the outputs. When

pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE

input does not affect the state of the flip-flops.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices as translators in

mixed 3.3 V and 5 V applications.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 5 V tolerant inputs/outputs; for interfacing with 5 V logic

 Wide supply voltage range from 1.2 V to 3.6 V

 CMOS low power consumption

 Direct interface with TTL levels

 High-impedance when V_CC= 0 V

 8-bit positive edge-triggered register

 Independent register and 3-state buffer operation

 Complies with JEDEC standard:

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A (2.3 V to 2.7 V)

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

12 3 4 5 6 7...18

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与935299315115相关器件

型号	品牌	获取价格	描述	数据表
935299385118	NXP	获取价格	8 I/O, PIA-GENERAL PURPOSE, PDSO16
935299386128	NXP	获取价格	8 I/O, PIA-GENERAL PURPOSE, PQCC16
935299446125	NXP	获取价格	AUP/ULP/V SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, V
935299449125	NXP	获取价格	AUP/ULP/V SERIES, TRIPLE 1-INPUT INVERT GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50
935299475118	NXP	获取价格	LVC/LCX/Z SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 6.10 MM, PLASTIC, MO-153, S
935299478118	NXP	获取价格	LVC/LCX/Z SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 6.10 MM, PLASTIC, MO-153, S
935299479518	NXP	获取价格	LVC/LCX/Z SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA56, 4.50 X 7 MM, 0.65 MM HEIGHT
935299486125	NXP	获取价格	HC/UH SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8, 3 MM, PLASTIC, SOT505-2, TSSOP-8
935299504115	NXP	获取价格	Consumer Circuit
935299507518	NXP	获取价格	IC TRANSCEIVER CAN 14HVSON

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