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935278834115

更新时间： 2024-11-11 19:16:47
品牌 Logo 应用领域
恩智浦 - NXP 输出元件逻辑集成电路触发器
页数 文件大小 规格书
21页 490K
描述
HC/UH SERIES, ASYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PQCC16

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935278834115 技术参数

生命周期：Transferred包装说明：HVQCCN,
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.63其他特性：TCO OUTPUT;REGISTERED OUTPUTS
计数方向：UP系列：HC/UH
JESD-30 代码：R-PQCC-N16JESD-609代码：e4
长度：3.5 mm负载/预设输入：YES
逻辑集成电路类型：BINARY COUNTER工作模式：ASYNCHRONOUS
位数：8功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-40 °C输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装形状：RECTANGULAR封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
传播延迟（tpd）：230 ns座面最大高度：1 mm
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：NICKEL PALLADIUM GOLD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
触发器类型：POSITIVE EDGE宽度：2.5 mm
最小 fmax：26 MHzBase Number Matches：1

935278834115 数据手册

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74HC590  
8-bit binary counter with output register; 3-state  
Rev. 02 — 28 April 2009  
Product data sheet  
1. General description  
The 74HC590 is a high-speed Si-gate CMOS device and is pin compatible with Low  
power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.  
The 74HC590 is an 8-bit binary counter with a storage register and 3-state outputs. The  
storage register has parallel (Q0 to Q7) outputs. The binary counter features a master  
reset counter (MRC) and count enable (CE) inputs. The counter and storage register have  
separate positive edge triggered clock (CPC and CPR) inputs. If both clocks are  
connected together, the counter state always is one count ahead of the register. Internal  
circuitry prevents clocking from the clock enable. A ripple carry output (RCO) is provided  
for cascading. Cascading is accomplished by connecting RCO of the first stage to CE of  
the second stage. Cascading for larger count chains can be accomplished by connecting  
RCO of each stage to the counter clock (CPC) input of the following stage. If both clocks  
are connected together, the counter state always is one count ahead of the register.  
2. Features  
I Counter and register have independent clock inputs  
I Counter has master reset  
I Complies with JEDEC standard no. 7A  
I Multiple package options  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 2000 V  
I Specified from −40 °C to +85 °C and from −40 °C to +125 °C  
3. Ordering information  
Table 1.  
Type number Package  
Temperature range Name  
Ordering information  
Description  
Version  
74HC590N  
74HC590D  
−40 °C to +125 °C  
−40 °C to +125 °C  
DIP16  
plastic dual in-line package; 16 leads (300 mil)  
SOT38-4  
SO16  
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1  
74HC590PW −40 °C to +125 °C  
TSSOP16  
plastic thin shrink small outline package; 16 leads; body  
width 4.4 mm  
SOT403-1  
74HC590BQ −40 °C to +125 °C  
DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1  
quad flat package; no leads; 16 terminals; body  
2.5 × 3.5 × 0.85 mm  
1234567...21

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