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933999370518 PDF预览

933999370518

更新时间: 2024-11-11 19:22:03
品牌 Logo 应用领域
恩智浦 - NXP 先进先出芯片光电二极管
页数 文件大小 规格书
34页 297K
描述
64 X 4 OTHER FIFO, 98ns, PDSO16, PLASTIC, SOT-162, SO-16

933999370518 技术参数

生命周期:Obsolete包装说明:SOP,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.83
最长访问时间:98 ns其他特性:REGISTER BASED; BUBBLE BACK 2.7US
周期时间:83.33 nsJESD-30 代码:R-PDSO-G16
长度:10.3 mm内存密度:256 bit
内存宽度:4功能数量:1
端子数量:16字数:64 words
字数代码:64工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:64X4可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL座面最大高度:2.65 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

933999370518 数据手册

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74HC7403; 74HCT7403  
4-bit x 64-word FIFO register; 3-state  
Rev. 4 — 24 September 2012  
Product data sheet  
1. General description  
The 74HC7403; 74HCT7403 is an expandable, First-In First-Out (FIFO) memory  
organized as 64 words by 4 bits. A guaranteed 15 MHz data-rate makes it ideal for  
high-speed applications. A higher data-rate can be obtained in applications where the  
status flags are not used (burst-mode). With separate controls for shift-in (SI) and shift-out  
(SO), reading and writing operations are completely independent, allowing synchronous  
and asynchronous data transfers. Additional controls include a master-reset input (MR),  
an output enable input (OE) and flags. The data-in-ready (DIR) and data-out-ready (DOR)  
flags indicate the status of the device. Inputs include clamp diodes that enable the use of  
current limiting resistors to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Synchronous or asynchronous operation  
30 MHz (typical) shift-in and shift-out rates  
Readily expandable in word and bit dimensions  
Pinning arranged for easy board layout: input pins directly opposite output pins  
Input levels:  
For 74HC7403: CMOS level  
For 74HCT7403: TTL level  
3-state outputs  
Complies with JEDEC standard JESD7A  
ESD protection:  
HBM JESD22-A114F exceeds 2 000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Applications  
High-speed disc or tape controller  
Communications buffer  

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