Datasheet > 逻辑 > 计数器> 9084801MEAS2035

9084801MEAS2035

更新时间： 2024-11-11 03:13:07

品牌	Logo	应用领域
德州仪器 - TI		计数器触发器逻辑集成电路输出元件
页数	文件大小	规格书
21页	653K
描述
High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

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数据手册

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9084801MEAS2035 技术参数

是否无铅：	含铅	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	CERAMIC, DIP-16
针数：	16	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.25
Is Samacsys：	N	其他特性：	TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK
计数方向：	BIDIRECTIONAL	系列：	HCT
JESD-30 代码：	R-GDIP-T16	长度：	19.56 mm
负载/预设输入：	YES	逻辑集成电路类型：	BINARY COUNTER
工作模式：	SYNCHRONOUS	位数：	4
功能数量：	1	端子数量：	16
最高工作温度：	125 °C	最低工作温度：	-55 °C
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
传播延迟（tpd）：	60 ns	认证状态：	Not Qualified
座面最大高度：	5.08 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	NO	技术：	CMOS
温度等级：	MILITARY	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
触发器类型：	POSITIVE EDGE	宽度：	7.62 mm
最小 fmax：	15 MHz	Base Number Matches：	1

9084801MEAS2035 数据手册

CD54/74HC192,

CD54/74HC193, CD54/74HCT193

Data sheet acquired from Harris Semiconductor

SCHS163F

High-Speed CMOS Logic

Presettable Synchronous 4-Bit Up/Down Counters

September 1997 - Revised October 2003

Presetting the counter to the number on the preset data inputs

(P0-P3) is accomplished by a LOW asynchronous parallel

Features

• Synchronous Counting and Asynchronous

load input (PL). The counter is incremented on the low-to-high

transition of the Clock-Up input (and a high level on the Clock-

Down input) and decremented on the low to high transition of

the Clock-Down input (and a high level on the Clock-up input).

A high level on the MR input overrides any other input to clear

the counter to its zero state. The Terminal Count up (carry)

goes low half a clock period before the zero count is reached

and returns to a high level at the zero count. The Terminal

Count Down (borrow) in the count down mode likewise goes

low half a clock period before the maximum count (9 in the

192 and 15 in the 193) and returns to high at the maximum

count. Cascading is effected by connecting the carry and

borrow outputs of a less significant counter to the Clock-Up

and Clock-Down inputs, respectively, of the next most

significant counter.

[ /Title

(CD74

HC192

CD74

HC193

CD74

HCT19

• Two Outputs for N-Bit Cascading

• Look-Ahead Carry for High-Speed Counting

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

/Sub-

ject

• HC Types

- 2V to 6V Operation

If a decade counter is preset to an illegal state or assumes an

illegal state when power is applied, it will return to the normal

sequence in one count as shown in state diagram.

- High Noise Immunity: N = 30%, N = 30% of V

IL IH CC

(High

Speed

CMOS

Logic

Preset-

at V

= 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

Ordering Information

TEMP. RANGE

V = 0.8V (Max), V = 2V (Min)

IL IH

PART NUMBER

CD54HC192F3A

CD54HC193F3A

CD54HCT193F3A

CD74HC192E

( C)

PACKAGE

16 Ld CERDIP

16 Ld PDIP

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

-55 to 125

Description

The ’HC192, ’HC193 and ’HCT193 are asynchronously

presettable BCD Decade and Binary Up/Down synchronous

counters, respectively.

CD74HC192NSR

CD74HC192PW

CD74HC192PWR

CD74HC192PWT

CD74HC193E

16 Ld SOP

16 Ld TSSOP

16 Ld PDIP

Pinout

CD54HC192, CD54HC193, CD54HCT193 (CERDIP)

CD74HC192 (PDIP, SOP, TSSOP)

CD74HC193 (PDIP, SOIC)

CD74HCT193 (PDIP)

TOP VIEW

CD74HC193M

16 Ld SOIC

16 V

CD74HC193MT

CD74HC193M96

CD74HCT193E

16 Ld SOIC

15 P0

16 Ld SOIC

14 MR

13 TCD

12 TCU

11 PL

10 P2

CPD

CPU

16 Ld PDIP

NOTE: When ordering, use the entire part number. The sufﬁxes 96

and R denote tape and reel. The sufﬁx T denotes a small-quantity

reel of 250.

GND

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...21

中文翻译

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