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87004AG-03 PDF预览

87004AG-03

更新时间: 2024-11-05 19:52:43
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
13页 247K
描述
Clock Driver, PDSO20

87004AG-03 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TSSOP, TSSOP20,.25Reach Compliance Code:not_compliant
风险等级:5.92JESD-30 代码:R-PDSO-G20
JESD-609代码:e0湿度敏感等级:1
端子数量:20最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:2.5/3.3 V认证状态:Not Qualified
子类别:Clock Drivers表面贴装:YES
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

87004AG-03 数据手册

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PRELIMINARY  
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER  
ICS87004-03  
GENERAL DESCRIPTION  
FEATURES  
The ICS87004-03 is a low skew, ÷1, ÷2 ÷3, ÷4  
Two banks of two LVCMOS/LVTTL outputs,  
ICS  
HiPerClockS™  
÷5, ÷6 ÷8, ÷16 LVCMOS/LVTTL Fanout Buffer/  
Divider and a member of theHiPerClockS™ family  
of High Performance Clock Solutions from IDT. The  
ICS87004-03 has selectable clock inputs that  
15Ω typical output impedance  
• Selectable LVCMOS/LVTTL clock inputs  
LVCMOS_CLK supports the following input types: LVCMOS,  
LVTTL  
accept single ended input levels. Output enable pin controls  
whether the output is in the active or high impedance state.  
Maximum output frequency: 200MHz  
Output skew: 100ps (typical)  
Bank skew: 50ps (typical)  
The ICS87004-03 is characterized at 3.3V, 2.5V and mixed 3.3V/  
2.5V, 3.3V/1.8V, 2.5V/1.8V input/output supply operating  
modes.Guaranteed bank, output, and part-to-part skew  
characteristics make the ICS87004-03 ideal for those  
applications demanding well defined performance and  
repeatability.  
Part-to-part skew: TBD  
• Power supply modes:  
Core/Output  
3.3V/3.3V  
3.3V/2.5V  
3.3V/1.8V  
2.5V/2.5V  
2.5V/1.8V  
0°C to 70°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
Pullup  
OEA  
3
Pulldown  
NA2:NA0  
N Output Divider  
NA2:NA0  
PIN ASSIGNMENT  
0 0 0 ÷1 (default)  
VDD  
NA2  
NA1  
NA0  
OEA  
VDDOA  
QA0  
QA1  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
0 0 1 ÷2  
QA0  
0 1 0 ÷3  
0 1 1 ÷4  
Pulldown  
CLK_SEL  
QA1  
1 0 0 ÷5  
1 0 1 ÷6  
CLK0  
CLK_SEL  
CLK1  
GND  
QB1  
QB0  
VDD0A  
1 1 0 ÷8  
Pulldown  
Pulldown  
CLK0  
CLK1  
0
1
1 1 1 ÷16  
VDDOB  
NB2  
NB1  
NB0  
GND  
OEB  
N Output Divider  
NB2:NB0  
VDD0B  
0 0 0 ÷1 (default)  
0 0 1 ÷2  
ICS87004-03  
20-Lead TSSOP  
6.50mm x 4.40mm x 0.92mm package body  
G Package  
QB0  
QB1  
0 1 0 ÷3  
0 1 1 ÷4  
1 0 0 ÷5  
1 0 1 ÷6  
Top View  
1 1 0 ÷8  
1 1 1 ÷16  
3
Pulldown  
NB2:NB0  
OEB  
Pullup  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT/ ICSLVCMOS/LVTTL FANOUT BUFFER/DIVIDER  
1
ICS87004AG-03 REV. B FEBRUARY 5, 2007  

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