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87004AGI-03LFT PDF预览

87004AGI-03LFT

更新时间: 2024-11-05 20:59:59
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
12页 249K
描述
Low Skew Clock Driver, 87004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20

87004AGI-03LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.58其他特性:ALSO OPERATES AT 3.3V
系列:87004输入调节:MUX
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:6.5 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:20实输出次数:4
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

87004AGI-03LFT 数据手册

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PRELIMINARY  
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER  
ICS87004I-03  
GENERAL DESCRIPTION  
FEATURES  
The ICS87004I-03 is a low skew, ÷1, ÷2 ÷3, ÷4 ÷5,  
Two banks of two LVCMOS/LVTTL outputs,  
ICS  
HiPerClockS™  
÷6 ÷8, ÷16 LVCMOS/LVTTL Fanout Buffer/Divider  
and a member of theHiPerClockS™ family of High  
Performance Clock Solutions from IDT. The  
ICS87004I-03 has selectable clock inputs that  
15Ω typical output impedance  
• Selectable LVCMOS/LVTTL clock inputs  
• LVCMOS_CLK supports the following input types: LVCMOS,  
LVTTL  
accept single ended input levels. Output enable pin controls  
whether the output is in the active or high impedance state.  
Maximum output frequency: 250MHz  
Output skew: 40ps (typical)  
Bank skew: 20ps (typical)  
The ICS87004I-03 is characterized at 3.3V, 2.5V and mixed  
3.3V/2.5V, 3.3V/1.8V, 2.5V/1.8V input/output supply operating  
modes.Guaranteed bank, output, and part-to-part skew  
characteristics make the ICS87004I-03 ideal for those  
applications demanding well defined performance and  
Part-to-part skew: TBD  
• Power supply modes:  
Core/Output  
3.3V/3.3V  
repeatability.  
3.3V/2.5V  
3.3V/1.8V  
2.5V/2.5V  
2.5V/1.8V  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
Pullup  
OEA  
3
Pulldown  
NA2:NA0  
N Output Divider  
NA2:NA0  
PIN ASSIGNMENT  
0 0 0 ÷1 (default)  
VDD  
NA2  
NA1  
NA0  
OEA  
VDDOA  
QA0  
QA1  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
0 0 1 ÷2  
QA0  
0 1 0 ÷3  
0 1 1 ÷4  
Pulldown  
CLK_SEL  
QA1  
1 0 0 ÷5  
1 0 1 ÷6  
CLK0  
CLK_SEL  
CLK1  
GND  
QB1  
QB0  
VDDOB  
VDD0A  
1 1 0 ÷8  
Pulldown  
Pulldown  
CLK0  
CLK1  
0
1
NB2  
NB1  
1 1 1 ÷16  
GND  
OEB  
NB0  
N Output Divider  
NB2:NB0  
VDD0B  
ICS87004I-03  
20-Lead TSSOP  
6.50mm x 4.40mm x 0.925mm package body  
G Package  
0 0 0 ÷1 (default)  
0 0 1 ÷2  
QB0  
QB1  
0 1 0 ÷3  
0 1 1 ÷4  
1 0 0 ÷5  
Top View  
1 0 1 ÷6  
1 1 0 ÷8  
1 1 1 ÷16  
3
Pulldown  
NB2:NB0  
OEB  
Pullup  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT/ ICSLVCMOS/LVTTL FANOUT BUFFER/DIVIDER  
1
ICS87004BGI-03 REV. B JUNE 10, 2008  

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