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87008AGILF PDF预览

87008AGILF

更新时间： 2024-09-27 01:16:59
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
16页 292K
描述
LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR

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中文翻译

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87008AGILF 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP24,.25针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：7.49
其他特性：CAN ALSO OPERATE WITH 3.3V SUPPLY系列：87008
输入调节：DIFFERENTIAL MUXJESD-30 代码：R-PDSO-G24
JESD-609代码：e3长度：7.8 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER湿度敏感等级：1
功能数量：1反相输出次数：
端子数量：24实输出次数：8
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：2.5/3.3 V
Prop。Delay @ Nom-Sup：5.5 ns传播延迟（tpd）：5.6 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.15 ns
座面最大高度：1.2 mm子类别：Clock Drivers
最大供电电压 (Vsup)：2.625 V最小供电电压 (Vsup)：2.375 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn) - annealed
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mm最小 fmax：250 MHz
Base Number Matches：1

87008AGILF 数据手册

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ICS87008I  
LOW SKEW, 1-TO-8  
DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR  
GENERAL DESCRIPTION  
FEATURES  
The ICS87008I is a low skew, 1:8 LVCMOS/LVTTL Clock • Eight LVCMOS/LVTTL outputs (2 banks of 4 outputs)  
Generator. The device has 2 banks of 4 outputs and each  
• Selectable differential CLK1, nCLK1 or  
bank can be independently selected for ÷1 or ÷2 frequency  
LVCMOS clock input  
operation. Each bank also has its own power supply pins so  
that the banks can operate at the following different voltage  
levels: 3.3V, 2.5V, and 1.8V. The low impedance LVCMOS/  
LVTTL outputs are designed to drive 50Ω series or parallel  
terminated transmission lines.  
• CLK1, nCLK1 pair can accept the following differential  
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL  
• CLK0 supports the following input types:  
LVCMOS, LVTTL  
The divide select inputs, DIV_SELA and DIV_SELB, control the  
output frequency of each bank. The output banks can be  
independently selected for ÷1 or ÷2 operation. The bank enable  
inputs, CLK_ENA and CLK_ENB, support enabling and disabling  
each bank of outputs individually. The CLK_ENA and CLK_ENB  
circuitry has a synchronizer to prevent runt pulses when  
enabling or disabling the clock outputs. The master reset  
input, nMR/OE, resets the ÷1/÷2 flip flops and also controls the  
active and high impedance states of all outputs. This pin has  
an internal pull-up resistor and is normally used only for test  
purposes or in systems which use low power modes.  
• Maximum output frequency: 250MHz  
• Independent bank control for ÷1 or ÷2 operation  
• Glitchless, asynchronous clock enable/disable  
• Output skew: 105ps (maximum) @ 3.3V core/3.3V output  
• Bank skew: 70ps (maximum) @ 3.3V core/3.3V output  
• 3.3V or 2.5V core/3.3V, 2.5V, or 1.8V output operating  
supply  
• -40°C to 85°C ambient operating temperature  
The ICS87008I is characterized to operate with the core at 3.3V  
or 2.5V and the banks at 3.3V, 2.5V, or 1.8V. Guaranteed bank,  
output, and part-to-part skew characteristics make the 87008I  
ideal for those clock applications demanding well-defined  
performance and repeatability.  
• Available in both standard and lead-free RoHS compliant  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
nMR/OE  
CLK1  
nCLK1  
VDDOA  
24 CLK0  
1
2
3
4
5
6
7
8
DIV_SELA  
CLK1  
CLK_SEL  
VDDOB  
23  
22  
QA0  
QA1  
GND  
QA2  
21 QB0  
20  
19 GND  
1
0
÷1  
÷2  
1
0
nCLK1  
QB1  
4
4
QA0:QA3  
QB0:QB3  
CLK0  
LE  
D
QB2  
QB3  
VDDOB  
DIV_SELB  
CLK_ENB  
nMR/OE  
18  
17  
16  
15  
14  
13  
CLK_ENA  
QA3  
VDDOA  
DIV_SELA  
CLK_ENA  
VDD  
9
10  
11  
12  
CLK_SEL  
1
0
LE  
D
ICS87008I  
CLK_ENB  
DIV_SELB  
24-Lead TSSOP  
4.4mm x 7.8mm x 0.92mm body package  
G Package  
Top View  
87008AGI  
www.idt.com  
REV. B JULY 31, 2010  
1
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中文翻译

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87008AGILF 替代型号

型号 品牌 替代类型 描述 数据表
87008AGILFT IDT

完全替代

 LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ICS87008AGILFT IDT

功能相似

 Low Skew Clock Driver, 87008 Series, 8 True Output(s), 0 Inverted Output(s), PDSO24, 4.40
87008AGIT IDT

功能相似

 Low Skew Clock Driver, 87008 Series, 8 True Output(s), 0 Inverted Output(s), PDSO24, 4.40

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