Datasheet > 854S058I

854S058I

更新时间： 2023-12-20 18:46:04

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描述
8:1 Differential-to-LVDS Clock Multiplexer

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854S058I 数据手册

ICS854S058I Datasheet

8:1, DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER

Additive Phase Jitter

The spectral purity in a band at a specific offset from the fundamental

compared to the power of the fundamental is called the dBc Phase

Noise. This value is normally expressed using a Phase noise plot

and is most often the specified plot in many applications. Phase noise

is defined as the ratio of the noise power present in a 1Hz band at a

specified offset from the fundamental frequency to the power value of

the fundamental. This ratio is expressed in decibels (dBm) or a ratio

of the power in the 1Hz band to the power in the fundamental. When

the required offset is specified, the phase noise is called a dBc value,

which simply means dBm at a specified offset from the fundamental.

By investigating jitter in the frequency domain, we get a better

understanding of its effects on the desired application over the entire

time record of the signal. It is mathematically possible to calculate an

expected bit error rate given a phase noise plot.

Additive Phase Jitter @ 155.52MHz

12kHz to 20MHz = 0.065ps (typical)

Offset from Carrier Frequency (Hz)

As with most timing specifications, phase noise measurements has

issues relating to the limitations of the equipment. Often the noise

floor of the equipment is higher than the noise floor of the device. This

is illustrated above. The device meets the noise floor of what is

shown, but can actually be lower. The phase noise is dependent on

the input source and measurement equipment.

The source generator "IFR2042 10kHz – 56.4GHz Low Noise Signal

Generator as external input to an Agilent 8133A 3GHz Pulse

Generator".

ICS854S058AGI REVISION A OCTOBER 29, 2012

1...3 4 567 8 9...17

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型号	品牌	描述	获取价格	数据表
854S14AKI	IDT	Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95	获取价格
854S14AKILFT	IDT	Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95	获取价格
854S14AKT	IDT	Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95	获取价格
854S202AYI	IDT	Clock Driver	获取价格
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854S202AYI-01T	IDT	Differential Multiplexer, 2 Func, 12 Channel, PQFP48	获取价格