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8516FY PDF预览

8516FY

更新时间: 2024-11-04 21:17:19
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
16页 239K
描述
Low Skew Clock Driver, 8516 Series, 16 True Output(s), 0 Inverted Output(s), CMOS, PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBC, LQFP-48

8516FY 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:7 X 7 MM, 1.40 MM HEIGHT, MS-026BBC, LQFP-48针数:48
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.09
系列:8516输入调节:DIFFERENTIAL
JESD-30 代码:S-PQFP-G48JESD-609代码:e0
长度:7 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:48
实输出次数:16最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP48,.35SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):240
电源:3.3 VProp。Delay @ Nom-Sup:2.9 ns
传播延迟(tpd):2.4 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.09 ns座面最大高度:1.6 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:20
宽度:7 mmBase Number Matches:1

8516FY 数据手册

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Low Skew, 1-to-16  
Differential-to-LVDS Clock Distribution Chip  
ICS8516  
DATASHEET  
GENERAL DESCRIPTION  
FEATURES  
The ICS8516 is a low skew, high performance 1-to-16 Differential- Sixteen differential LVDS outputs  
to-LVDSClockDistributionChip.TheICS8516CLK, nCLKpaircan  
CLK, nCLK pair can accept the following differential  
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL  
accept anydifferentialinputlevelsandtranslatesthemto3.3VLVDS  
output levels.Utilizing LowVoltage Differential Signaling (LVDS),  
the ICS8516 provides a low power, low noise, point-to-point  
solution for distributing clock signals over controlled impedances  
of 100Ω.  
Maximum output frequency: 700MHz  
Translates any differential input signal (LVPECL, LVHSTL,  
SSTL, DCM) to LVDS levels without external bias networks  
Dual output enable inputs allow the ICS8516 to be used in a  
1-to-16 or 1-to-8 input/output mode.  
Translates any single-ended input signal to LVDS  
with resistor bias on nCLK input  
Guaranteed output and part-to-part skew specifications make  
the ICS8516 ideal for those applications demanding well  
defined performance and repeatability.  
Multiple output enable inputs for disabling unused  
outputs in reduced fanout applications  
LVDS compatible  
Output skew: 90ps (maximum)  
Part-to-part skew: 500ps (maximum)  
Propagation delay: 2.4ns (maximum)  
Additive phase jitter, RMS: 148fs (typical)  
3.3V operating supply  
0°C to 70°C ambient operating temperature  
Available in lead-free RoHS compliant package  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
48-Lead LQFP  
7mm x 7mm x 1.4mm body package  
Y Package  
Top View  
8516 REVISION B 6/11/15  
1
©2015 Integrated Device Technology, Inc.  

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