Datasheet > 844001AG

844001AG

更新时间： 2024-02-14 21:12:12

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844001AG 数据手册

ICS844001

FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR

POWER CONSIDERATIONS

This section provides information on power dissipation and junction temperature for the ICS844001.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the ICS844001 is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for V = 3.3V + 5% = 3.465V, which gives worst case results.

•

Power (core) = V

* (I

+ I

) = 3.465V * (115mA + 12mA) = 440mW

DDA_MAX

MAX

DD_MAX

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the

device. The maximum recommended junction temperature is 125°C.

The equation for Tj is as follows: Tj = θ_JA* Pd_total + T_A

Tj = Junction Temperature

= Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

T_A= Ambient Temperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ must be used. Assuming a

moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 6 below.

Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:

70°C + 0.440W *90.5°C/W = 109.8°C. This is well below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and

the type of board (single layer or multi-layer).

TABLE 6. THERMAL RESISTANCE θ FOR 8-PIN TSSOP, FORCED CONVECTION

θ by Velocity (Meters per Second)

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

101.7°C/W

90.5°C/W

89.8°C/W

IDT^™/ ICS^™FEMTOCLOCKS™ CLOCK GENERATOR

ICS844001 REV A NOVEMBER 2, 2012

1...6 7 8910 11 12...14

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