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844001AG

更新时间： 2024-02-19 03:58:00

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844001AG 数据手册

ICS844001

FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR

3.3V, 2.5V LVDS DRIVER TERMINATION

A general LVDS interface is shown in Figure 4. In a 100Ω

differential transmission line environment, LVDS drivers

require a matched load termination of 100Ω across near

the receiver input. For a multiple LVDS outputs buffer, if only

partial outputs are used, it is recommended to terminate the

unused outputs.

2.5V or 3.3V

VDD

LVDS_Driv er

100

100 Ohm Differential Transmission Line

FIGURE 4. TYPICAL LVDS DRIVER TERMINATION

IDT^™/ ICS^™FEMTOCLOCKS™ CLOCK GENERATOR

ICS844001 REV A NOVEMBER 2, 2012

1...5 6 789 10 11...14

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型号	品牌	获取价格	描述	数据表
844001AG-21	IDT	获取价格	Clock Generator, 700MHz, PDSO24, 4.40 X 7.80 MM, 0.925 MM HEIGHT, MO-153, TSSOP-24
844001AG-21LF	IDT	获取价格	Clock Generator, 700MHz, CMOS, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-
844001AG-21T	IDT	获取价格	Clock Generator, 700MHz, PDSO24, 4.40 X 7.80 MM, 0.925 MM HEIGHT, MO-153, TSSOP-24
844001AGT	IDT	获取价格	Clock Generator, 226.66MHz, CMOS, PDSO8, 4.40 X 3 MM, 0.925 MM HEIGHT, MO-153, TSSOP-8
844002AG-01	IDT	获取价格	FEMTOCLOCKS⑩ CRYSTAL-TOLVDS FREQUENCY SYNTHES
844002AG-01LF	IDT	获取价格	FEMTOCLOCKS⑩ CRYSTAL-TOLVDS FREQUENCY SYNTHES
844002AG-01LFT	IDT	获取价格	FEMTOCLOCKS⑩ CRYSTAL-TOLVDS FREQUENCY SYNTHES
844002AG-01T	IDT	获取价格	FEMTOCLOCKS⑩ CRYSTAL-TOLVDS FREQUENCY SYNTHES
844002AGI	IDT	获取价格	PLL/Frequency Synthesis Circuit
844002AGI-01	IDT	获取价格	FEMTOCLOCKS CRYSTAL-TOLVDS FREQUENCY SYNTHESIZER