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841402DKILF

更新时间: 2024-11-04 19:59:43
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
27页 700K
描述
Clock Generator, 400MHz, CMOS, 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2/-4, VFQFN-32

841402DKILF 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:HVQCCN, LCC32,.2SQ,20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.81JESD-30 代码:S-XQCC-N32
长度:5 mm端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:400 MHz封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
主时钟/晶体标称频率:25 MHz认证状态:Not Qualified
座面最大高度:1 mm子类别:Clock Generators
最大压摆率:156 mA最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

841402DKILF 数据手册

 浏览型号841402DKILF的Datasheet PDF文件第2页浏览型号841402DKILF的Datasheet PDF文件第3页浏览型号841402DKILF的Datasheet PDF文件第4页浏览型号841402DKILF的Datasheet PDF文件第5页浏览型号841402DKILF的Datasheet PDF文件第6页浏览型号841402DKILF的Datasheet PDF文件第7页 
FemtoClock® Crystal-to-0.7V Differential  
HCSL Clock Generator  
ICS841402I  
DATA SHEET  
General Description  
Features  
The ICS841402I is an optimized PCIe and sRIO clock generator.  
The device uses a 25MHz parallel resonant crystal to generate  
100MHz, 125MHz, 200MHz and 400MHz clock signals, replacing  
solutions requiring multiple oscillator and fanout buffer solutions. The  
device has excellent phase jitter suitable to clock components  
requiring precise and low jitter PCIe, sRIO or both clock signals. The  
device also supports a configurable spread-spectrum generation for  
PCIe applications. Designed for telecom, networking and industrial  
applications, the ICS841402I can also drive the high-speed sRIO  
and PCIe SerDes clock inputs of communications processors,  
DSPs, switches and bridges.  
Two 0.7V differential HCSL outputs: configurable for PCIe  
(100MHz or 200MHz) and sRIO (125MHz) clock signals  
One LVCMOS/LVTTL reference clock output  
Selectable crystal oscillator interface, 25MHz, 18pF parallel  
resonant crystal or LVCMOS/LVTTL single-ended reference clock  
input  
Supports the following output frequencies: 100MHz, 125MHz,  
200MHz or 400MHz  
VCO frequency range: 950MHz - 1.25GHz  
Configurable spread-spectrum generation for PCIe  
PLL bypass and output enable  
RMS phase jitter @ 200MHz, using a 25MHz crystal  
(12kHz – 20MHz): 1.21ps (typical)  
PCI Express (2.5 Gb/S), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) jitter  
compliant (REF_OUT disabled)  
Full 3.3V operating supply  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) packages  
Block Diagram  
Pulldown  
OE_REFOUT  
25MHz  
REF_OUT  
25MHz  
=
N
÷
XTAL_IN  
Q0  
1
0
0
1
OSC  
÷
÷
÷
nQ0  
FemtoClock  
PLL  
XTAL_OUT  
REF_IN  
Spread-Spectrum  
Q1  
Pulldown  
Pulldown  
nQ1  
Pin Assignment  
REF_SEL  
M =  
÷40, ÷48  
IREF  
SSM  
Pulldown  
Pulldown  
32 31 30 29 28 27 26 25  
BYPASS  
1
2
3
24  
23  
22  
XTAL_IN  
XTAL_OUT  
MR/nOE  
VDD  
VDD  
2
Pullup:Pulldown  
Pulldown  
FSEL[1:0]  
MR/nOE  
FSEL1  
FSEL0  
REF_OUT  
OE_REFOUT  
GND  
ICS841402I  
32-Lead VFQFN  
5mm x 5mm x 0.925mm  
package body  
K Package  
4
5
21  
20  
Q0  
nQ0  
6
7
8
19  
18  
17  
Q1  
nc  
Top View  
nQ1  
nc  
9
10 11 12 13 14 15 16  
ICS841402DKI REVISION A NOVEMBER 7, 2012  
1
©2012 Integrated Device Technology, Inc.  

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