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8414201BA PDF预览

8414201BA

更新时间: 2024-12-01 13:05:03
品牌 Logo 应用领域
德州仪器 - TI 栅极逻辑集成电路输出元件输入元件
页数 文件大小 规格书
14页 752K
描述
ALS SERIES, QUAD 2-INPUT AND GATE, CDFP14, CERAMIC, FLAT PACK-14

8414201BA 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP, FL14,.3针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.59系列:ALS
JESD-30 代码:R-GDFP-F14逻辑集成电路类型:AND GATE
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出特性:OPEN-COLLECTOR
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装等效代码:FL14,.3封装形状:RECTANGULAR
封装形式:FLATPACK电源:5 V
传播延迟(tpd):69 ns认证状态:Qualified
施密特触发器:NO筛选级别:MIL-PRF-38535
子类别:Gate最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

8414201BA 数据手册

 浏览型号8414201BA的Datasheet PDF文件第2页浏览型号8414201BA的Datasheet PDF文件第3页浏览型号8414201BA的Datasheet PDF文件第4页浏览型号8414201BA的Datasheet PDF文件第5页浏览型号8414201BA的Datasheet PDF文件第6页浏览型号8414201BA的Datasheet PDF文件第7页 
SN54ALS09, SN74ALS09  
QUADRUPLE 2-INPUT POSITIVE-AND GATES  
WITH OPEN-COLLECTOR OUTPUTS  
SDAS084B – APRIL 1982 – REVISED DECEMBER 1994  
SN54ALS09 . . . J PACKAGE  
SN74ALS09 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1A  
1B  
1Y  
2A  
2B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
4B  
4A  
4Y  
3B  
3A  
3Y  
description  
These devices contain four independent 2-input  
positive-AND gates. They perform the Boolean  
functions Y = A B or Y = A + B in positive logic.  
The open-collector outputs require pullup  
resistors to perform correctly. These outputs may  
be connected to other open-collector outputs to  
implement active-low wired-OR or active-high  
wired-AND functions. Open-collector devices are  
2Y  
GND  
8
SN54ALS09 . . . FK PACKAGE  
(TOP VIEW)  
often used to generate higher V  
levels.  
OH  
The SN54ALS09 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74ALS09 is characterized for  
operation from 0°C to 70°C.  
3
2
1
20 19  
18  
1Y  
NC  
2A  
4
5
6
7
8
4A  
NC  
4Y  
NC  
3B  
17  
16  
15  
14  
NC  
2B  
FUNCTION TABLE  
(each gate)  
9 10 11 12 13  
INPUTS  
OUTPUT  
Y
A
B
H
X
L
H
L
H
L
L
NC – No internal connection  
X
logic symbol  
logic diagram (positive logic)  
1
1
1A  
2
1A  
2
3
6
&
3
6
8
1Y  
2Y  
3Y  
4Y  
1Y  
2Y  
3Y  
4Y  
1B  
1B  
4
4
2A  
5
2A  
5
2B  
9
2B  
9
3A  
3A  
10  
3B  
12  
4A  
13  
4B  
8
10  
3B  
12  
4A  
11  
11  
13  
4B  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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