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82P33931-1BAG8 PDF预览

82P33931-1BAG8

更新时间: 2024-11-09 00:52:23
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
4页 125K
描述
Synchronization System for IEEE 1588

82P33931-1BAG8 数据手册

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Synchronization System  
for IEEE 1588  
82P33931 / 82P33931-1  
Datasheet  
HIGHLIGHTS  
APPLICATIONS  
• System implements ITU-T telecom profiles  
• Composed of IDT’s IEEE 1588 software and IDT’s Synchronization  
Management Unit (SMU) hardware  
• Access routers, edge routers, core routers  
• Carrier Ethernet switches  
• Multiservice access platforms  
• Operates as IEEE 1588 / PTP slave  
• PON OLT  
• Recovers accurate and stable synchronization signals from packet  
based IEEE 1588 / PTP master  
• Provides integrated physical layer frequency support  
• Operates as an IEEE 1588 / PTP master  
• LTE eNodeB  
• ITU-T G.8265.1 & G.8275.1 Telecom Profile clock synthesizer  
• ITU-T G.8273.2 Telecom Boundary Clock (T-BC) and Telecom  
• Time Slave Clock (T-TSC)  
• ITU-T G.8264 Synchronous Equipment Timing Source (SETS)  
• ITU-T G.8263 Packet-based Equipment Clock (PEC)  
• ITU-T G.8262 Synchronous Ethernet Equipment Clock (EEC)  
• ITU-T G.813 Synchronous Equipment Clock (SEC)  
• Telcordia GR-253-CORE Stratum 3 Clock (S3) and SONET Minimum  
Clock (SMC)  
SOFTWARE  
• C99 source code distribution, supporting POSIX-based Operating Sys-  
tems (OSs) such as Linux  
• IEEE 1588 compliant Precision Time Protocol (PTP) stack  
• Abstraction interface supports user-supplied IEEE 1588 compliant Pre-  
cision Time Protocol (PTP) stack  
• Reference trackers filter packet synchronization noise from IEEE 1588  
unaware networks  
HARDWARE  
• Synchronization Management Unit (SMU) provides tools to manage  
physical layer and packet based synchronous clocks for IEEE 1588  
Telecom Profile applications  
• Supports independent IEEE 1588 and Synchronous Ethernet (SyncE)  
timing paths  
• Combo mode provides SyncE physical layer frequency support for IEEE  
1588 Telecom Boundary Clocks (T-BC) and Telecom Time Slave Clocks  
(T-TSC) per G.8273.2  
• Digital PLLs can be configured as Digitally Controlled Oscillators  
(DCOs) for IEEE 1588 clock synthesis  
• Generates G.8262 compliant SyncE clocks  
• Fractional-N input dividers support a wide range of reference frequen-  
cies  
• Locks to 1 pulse per second (PPS) references from GPS based sources  
• Loads configuration from an external EPROM after reset  
©2017 Integrated Device Technology, Inc.  
0
April 5, 2017  

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