Datasheet > 810252AKI-03LF

810252AKI-03LF

更新时间： 2024-11-04 19:58:11

品牌	Logo	应用领域
艾迪悌 - IDT		驱动逻辑集成电路
页数	文件大小	规格书
21页	597K
描述
PLL Based Clock Driver

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中文翻译

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技术参数
数据手册

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810252AKI-03LF 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.68
逻辑集成电路类型：	PLL BASED CLOCK DRIVER	Base Number Matches：	1

810252AKI-03LF 数据手册

VCXO JITTER ATTENUATOR &

FEMTOCLOCK™ MULTIPLIER

^ICS810N²⁵R²N^I-0D³

GENERAL DESCRIPTION

FEATURES

• Two LVCMOS/LVTTL outputs, 17Ω impedance

Each output supports independent frequency selection at

25MHz, 62.5MHz, 125MHz, and 156.25MHz

The ICS810252I-03 is

a member of the

ICS

HiPerClockS™

HiperClockS™ family of high performance clock

solutions from IDT. The ICS810252I-03 is a PLL

based synchronous multiplier that is optimized for

PDH or SONET to Ethernet clock jitter attenuation

• Two differential inputs support the following input types:

LVPECL, LVDS, LVHSTL, SSTL, HCSL

and frequency translation. The device contains two internal

frequency multiplication stages that are cascaded in series.

The first stage is a VCXO PLL that is optimized to provide

reference clock jitter attenuation. The second stage is a

FemtoClock™ frequency multiplier that provides the low jitter,

high frequency Ethernet output clock that easily meets Gigabit

and 10 Gigabit Ethernet jitter requirements. Pre-divider and

output divider multiplication ratios are selected using device

selection control pins. The multiplication ratios are optimized

to support most common clock rates used in PDH, SONET

and Ethernet applications. The VCXO requires the use of an

external, inexpensive pullable crystal. The VCXO uses external

passive loop filter components which allows configuration of

the PLL loop bandwidth and damping characteristics. The

device is packaged in a space-saving 32-VFQFN package and

supports industrial temperature range.

• Accepts input frequencies from 8kHz to 155.52MHz including

8kHz, 1.544MHz, 2.048MHz, 19.44MHz, 25MHz, 77.76MHz,

125MHz and 155.52MHz

• Attenuates the phase jitter of the input clock by using a low-

cost pullable fundamental mode VCXO crystal

• VCXO PLL bandwidth can be optimized for jitter attenuation

and reference tracking using external loop filter connection

• FemtoClock frequency multiplier provides low jitter, high

frequency output

• Absolute pull range: 50ppm

• FemtoClock VCO frequency: 625MHz

• RMS phase jitter @ 125MHz, using a 25MHz crystal

(12kHz - 20MHz): 1.3ps (typical)

• 3.3V supply voltage

• -40°C to 85°C ambient operating temperature

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

PIN ASSIGNMENT

packages

• Not Recommended for New Designs. This part is being

replaced by ICS810252BKI-03 / ICS810252BYI-03

32 31 30 29 28 27 26 25

LF1

LF0

GND

V^DDO_QB

ISET

GND

ICS810252I-03

CLK_SEL

V^DD

V^DDO_QA

RESERVED

GND

ODASEL_0

9 10 11 12 13 14 15 16

32-Lead VFQFN

5mm x 5mm x 0.925mm package body

K Package

Top View

32-Lead TQFP, E-Pad

7mm x 7mm x 1.0mm package body

Y package

Top View

IDT^™/ ICS^™VCXO JITTER ATTENUATOR/MULTIPLIER

ICS810252AKI-03 REV. A JANUARY 13, 2009

12 3 4 5 6 7...21

中文翻译

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与810252AKI-03LF相关器件

型号	品牌	获取价格	描述	数据表
810252AKI-03T	IDT	获取价格	PLL Based Clock Driver
810252AYI-03LF	IDT	获取价格	PLL Based Clock Driver
810252BKI-02	IDT	获取价格	PLL Based Clock Driver, 810252 Series, 2 True Output(s), 0 Inverted Output(s), 5 X 5 MM, 0
810252BKI-02LF	IDT	获取价格	PLL Based Clock Driver, 810252 Series, 2 True Output(s), 0 Inverted Output(s), 5 X 5 MM, 0
810252BKI-02T	IDT	获取价格	PLL Based Clock Driver, 810252 Series, 2 True Output(s), 0 Inverted Output(s), 5 X 5 MM, 0
810252BKI-03LF	IDT	获取价格	VCXO Jitter Attenuator and FemtoClock™ Multip
810252BKI-03LFT	IDT	获取价格	VCXO Jitter Attenuator and FemtoClock™ Multip
810252BYI-03LF	IDT	获取价格	VCXO Jitter Attenuator and FemtoClock™ Multip
810252BYI-03LFT	IDT	获取价格	VCXO Jitter Attenuator and FemtoClock™ Multip
810252I	IDT	获取价格	VCXO and Synchronous Ethernet Jit ter At tenuator

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