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80C32-44R PDF预览

80C32-44R

更新时间: 2024-10-27 22:46:23
品牌 Logo 应用领域
TEMIC 微控制器
页数 文件大小 规格书
20页 227K
描述
CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller

80C32-44R 数据手册

 浏览型号80C32-44R的Datasheet PDF文件第4页浏览型号80C32-44R的Datasheet PDF文件第5页浏览型号80C32-44R的Datasheet PDF文件第6页浏览型号80C32-44R的Datasheet PDF文件第8页浏览型号80C32-44R的Datasheet PDF文件第9页浏览型号80C32-44R的Datasheet PDF文件第10页 
MATRA MHS  
80C32/80C52  
When the port latch contains a 0, all pFETS in figure 4 are  
off while the nFET is turned on. When the port latch  
makes a 0-to-1 transition, the nFET turns off. The strong  
pFET, T1, turns on for two oscillator periods, pulling the  
output high very rapidly. As the output line is drawn high,  
pFET T3 turns on through the inverter to supply the IOH  
source current. This inverter and T form a latch which  
holds the 1 and is supported by T2.  
Figure 5. Crystal Oscillator.  
When Port 2 is used as an address port, for access to  
external program of data memory, any address bit that  
contains a 1 will have his strong pullup turned on for the  
entire duration of the external memory access.  
To drive the device from an external clock source,  
XTAL1 should be driven while XTAL2 is left  
unconnected as shown in figure 6. There are no  
requirements on the duty cycle of the external clock  
signal, since the input to the internal clocking circuitry is  
through a divide-by-two flip-flop, but minimum and  
maximum high and low times specified on the Data Sheet  
must be observed.  
When an I/O pin on Ports 1, 2, or 3 is used as an input, the  
user should be aware that the external circuit must sink  
current during the logical 1-to-0 transition. The  
maximum sink current is specified as ITL under the D.C.  
Specifications. When the input goes below  
approximately 2 V, T3 turns off to save ICC current. Note,  
when returning to a logical 1, T2 is the only internal  
pullup that is on. This will result in a slow rise time if the  
user’s circuit does not force the input line high.  
Figure 6. External Drive Configuration.  
Oscillator Characteristics  
XTAL1 and XTAL2 are the input and output respectively,  
of an inverting amplifier which is configured for use as an  
on-chip oscillator, as shown in figure 5. Either a quartz  
crystal or ceramic resonator may be used.  
Hardware Description  
Same as for the 80C51, plus a third timer/counter :  
that a 1-to-0 transition at external input T2EX causes the  
current value in the Timer 2 registers, TL2 and TH2, to  
be captured into registers RCAP2L and RCAP2H,  
respectively, (RCAP2L and RCAP2H are new Special  
Function Register in the 80C52). In addition, the  
transition at T2EX causes bit EXF2 in T2CON to be set,  
and EXF2, like TF2, can generate an interrupt.  
Timer/Event Counter 2  
Timer 2 is a 16 bit timer/counter like Timers 0 and 1, it  
can operate either as a timer or as an event counter. This  
is selected by bit C/T2 in the Special Function Register  
T2CON (Figure 1). It has three operating modes :  
“capture”, “autoload” and “baud rate generator”, which  
are selected by bits in T2CON as shown in Table 2.  
Table 2 : Timer 2 Operating Modes.  
RCLK +  
In the capture mode there are two options which are  
selected by bit EXEN2 in T2CON; If EXEN2 = 0, then  
Timer 2 is a 16 bit timer or counter which upon  
overflowing sets bit TF2, the Timer 2 overflow bit, which  
can be used to generate an interrupt. If EXEN2 = 1, then  
Timer 2 still does the above, but with the added feature  
CP/RL2  
TR2  
MODE  
TCLK  
0
0
1
0
1
X
X
1
1
1
0
16 bit auto-reload  
16 bit capture  
baud rate generator  
(off)  
X
Rev. E (31/08/95)  
7

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