5秒后页面跳转
80C32-44R PDF预览

80C32-44R

更新时间: 2024-10-27 22:46:23
品牌 Logo 应用领域
TEMIC 微控制器
页数 文件大小 规格书
20页 227K
描述
CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller

80C32-44R 数据手册

 浏览型号80C32-44R的Datasheet PDF文件第2页浏览型号80C32-44R的Datasheet PDF文件第3页浏览型号80C32-44R的Datasheet PDF文件第4页浏览型号80C32-44R的Datasheet PDF文件第6页浏览型号80C32-44R的Datasheet PDF文件第7页浏览型号80C32-44R的Datasheet PDF文件第8页 
MATRA MHS  
80C32/80C52  
1 FFFH). When EA is held low, the CPU executes only out  
of external Program Memory. EA must not be floated.  
PSEN  
Program Store Enable output is the read strobe to external  
Program Memory. PSEN is activated twice each machine  
cycle during fetches from external Program Memory.  
(However, when executing out of external Program  
Memory, two activations of PSEN are skipped during  
each access to external Data Memory). PSEN is not  
activated during fetches from internal Program Memory.  
PSEN can sink/source 8 LS TTL inputs. It can drive  
CMOS inputs without an external pullup.  
XTAL1  
Input to the inverting amplifier that forms the oscillator.  
Receives the external oscillator signal when an external  
oscillator is used.  
XTAL2  
Output of the inverting amplifier that forms the oscillator.  
This pin should be floated when an external oscillator is  
used.  
EA  
When EA is held high, the CPU executes out of internal  
Program Memory (unless the Program Counter exceeds  
Idle And Power Down Operation  
Figure 3 shows the internal Idle and Power Down clock  
configuration. As illustrated, Power Down operation  
stops the oscillator. Idle mode operation allows the  
interrupt, serial port, and timer blocks to continue to  
function, while the clock to the CPU is gated off.  
Symbol  
Position  
Name and Function  
SMOD  
PCON.7  
Double Baud rate bit. When set to  
a 1, the baud rate is doubled when  
the serial port is being used in  
either modes 1, 2 or 3.  
(Reserved)  
(Reserved)  
GF1  
GF0  
PD  
PCON.6  
PCON.5  
PCON.4  
PCON.3  
PCON.2  
PCON.1  
These special modes are activated by software via the  
Special Function Register, PCON. Its hardware address is  
87H. PCON is not bit addressable.  
(Reserved)  
General-purpose flag bit.  
General-purpose flag bit.  
Power Down bit. Setting this bit  
activates power down operation.  
Idle mode bit. Setting this bit  
activates idle mode operation.  
Figure 3. Idle and Power Down Hardware.  
IDL  
PCON.0  
If 1’s are written to PD and IDL at the same time. PD  
takes, precedence. The reset value of PCON is  
(000X0000).  
Idle Mode  
The instruction that sets PCON.0 is the last instruction  
executed before the Idle mode is activated. Once in the  
Idle mode the CPU status is preserved in its entirety : the  
Stack Pointer, Program Counter, Program Status Word,  
Accumulator, RAM and all other registers maintain their  
data during idle. Table 1 describes the status of the  
external pins during Idle mode.  
PCON : Power Control Register  
(MSB)  
SMOD  
(LSB)  
IDL  
GF1  
GF0  
PD  
Rev. E (31/08/95)  
5

与80C32-44R相关器件

型号 品牌 获取价格 描述 数据表
80C32C-12D TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-12R TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-16D TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-16R TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-20D TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-20R TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-25D TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-25R TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-30D TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
80C32C-30R TEMIC

获取价格

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller