PCMCIA Flash Memory Card
FLV Series
White Electronic Designs
BLOCK DIAGRAM
Device Pair (N/2 - 1)
CSn
Device (N-1)
Device (N-2)
Array
Address
Bus
ADDRESS
BUFFER
ADDRESS BUS
A1-A25
Control
Address
Bus
M Res
WE#
OE#
WL#
RL#
Control Logic
PCMCIA Interface
WH#
RH#
CE2#
CE1#
Cn
C0
CSn
REG#
Device Pair 1
A0
Device 3
Device 1
Device 2
Device 0
CS
1
CS0
WP
At/Reg enable
Ctrl
SR Clr
Reg Clr
SR#
PD#
CS0
Device Pair 0
Card
Management
Registers
4000h
0000h
Vcc
WH# RH#
WL# RL#
DATA
BUS
DATA
BUS
Vcc
attrib. mem
CIS
EEPROM 2kB
Q
8
-Q15
Q0-Q7
control
Q0-Q7
Vcc
I/O buffer
Device type
28F008SC
28F016SC
Manuf ID
89H
Device ID
A6H
DATA
BUS
-D
DATA
BUS
D
0
7
D8-D15
89H
AAH
REGISTERS IN ATTRIBUTE MEMORY SPACE*
CSR
CONFIGURATION STATUS REGISTER: ADRS =
4002H WRITE ONLY
ADDRESS
4100h
REGISTER NAME
Status Register
Not Supported
PDwn Not Supported
4002h
Config. and Status Register
Configuration Option Register
D7
D6
D5
D4
D3
D2
D1
D0
4000h
D2
Power Down, active High
* FLV51- FLV58 and cards without Attribute Memory do not
have registers.
1 = Place all memory devices in power down mode
0 = Normal Operation
Power On default = 0
COR
SR
CONFIGURATION OPTION REGISTER: ADRS =
STATUS REGISTER: ADRS = 4100H READ ONLY
4000H WRITE ONLY
SRES
LREQ
D6
Configuration Index
D3 D2
Not Supported SReset
PDwn Not Supported R/BSY#
D7
D6
D5
D4
D3
D2
D1
D0
D5
D4
D1
D0
D7
D5
Represents the state of SRESET bit in COR (4000h)
1 = Reset
0 = Normal Operation
D7
Soft Reset, active High
1 = Reset State
0 = End Reset State
Level Req (not supported)
Configuration index (not supported)
Power On default
D5 = 0
D6
D5-D0
D3
Represents the state of Power Down bit (D2) in CSR (4002h)
1 = Power Down
D0
Reflects the card's Ready/Busy signal (pin 16) driven by
memory components Ready/Busy outputs. This bit allows
software polling of the card's Ready/Busy status.
1 = Ready
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 5
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com