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74VHCT00SJX PDF预览

74VHCT00SJX

更新时间: 2024-11-24 19:52:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 120K
描述
NAND Gate, AHCT/VHCT Series, 4-Func, 2-Input, CMOS, PDSO14, EIAJ, PLASTIC, SOIC-14

74VHCT00SJX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.48
系列:AHCT/VHCTJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:10.1 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:9 ns传播延迟(tpd):9 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

74VHCT00SJX 数据手册

 浏览型号74VHCT00SJX的Datasheet PDF文件第2页浏览型号74VHCT00SJX的Datasheet PDF文件第3页浏览型号74VHCT00SJX的Datasheet PDF文件第4页浏览型号74VHCT00SJX的Datasheet PDF文件第5页浏览型号74VHCT00SJX的Datasheet PDF文件第6页浏览型号74VHCT00SJX的Datasheet PDF文件第7页 
February 1998  
74VHC00 74VHCT00  
Quad 2-Input NAND Gate  
General Description  
Features  
n High Speed:  
The VHC/VHCT00 is an advanced high-speed CMOS  
2-Input NAND Gate fabricated with silicon gate CMOS tech-  
nology. It achieves the high-speed operation similar to  
equivalent Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation. The internal circuit is com-  
posed of 3 stages, including buffer output, which provide  
high noise immunity and stable output. An input protection  
circuit insures that 0V to 7V can be applied to the input pins  
without regard to the supply voltage. This device can be  
used to interface 5V to 3V systems and two supply systems  
such as battery backup. This circuit prevents device destruc-  
tion due to mismatched supply and input voltages.  
=
=
=
VHC tpd 3.7ns (typ) at TA 25˚C  
=
VHCT tpd 5.0 ns (typ) at TA 25˚C  
n High noise immunity:  
=
=
VHC VNIH VNIL 28% VCC (min)  
=
=
VHCT VIH 2.0V, VIL 0.8V  
n Power down protection:  
VHC inputs only  
VHCT inputs and outputs  
n Low noise: VOLP 0.8V (max)  
n Low power dissipation:  
=
=
=
ICC 2 µA (max) at TA 25˚C  
n Pin and function compatible with 74HC/HCT00  
NOTE: ADD EXTERNAL PULL UP RESISTOR TO  
VHCT OUTPUTS TO DRIVE CMOS INPUTS  
Ordering Code:  
Commercial  
74VHC00M  
Package Number  
M14A  
Package Description  
14-Lead Molded JEDEC SOIC  
14-Lead Molded EIAJ SOIC  
14-Lead Molded JEDEC Type 1 TSSOP  
14-Lead Molded DIP  
74VHC00SJ  
74VHC00MTC  
74VHC00N  
M14D  
MTC14  
N14A  
74VHCT00M  
74VHCT00SJ  
74VHCT00MTC  
74VHCT00N  
M14A  
14-Lead Molded JEDEC SOIC  
14-Lead Molded EIAJ SOIC  
14-Lead Molded JEDEC Type 1 TSSOP  
14-Lead Molded DIP  
M14D  
MTC14  
N14A  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X’ to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Assignment for DIP,TSSOP and SOIC  
DS011504-1  
DS011504-2  
© 1998 Fairchild Semiconductor Corporation  
DS011504  
www.fairchildsemi.com  

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