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74VHCT02D,118 PDF预览

74VHCT02D,118

更新时间: 2023-12-18 00:00:00
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管逻辑集成电路
页数 文件大小 规格书
14页 76K
描述
74VHC(T)02 - Quad 2-input NOR gate SOIC 14-Pin

74VHCT02D,118 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:3.90 MM, PLASTIC, MS-012, SOT108-1, SOP-14针数:14
Reach Compliance Code:compliant风险等级:5.76
Base Number Matches:1

74VHCT02D,118 数据手册

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74VHC02; 74VHCT02  
Quad 2-input NOR gate  
Rev. 01 — 13 August 2009  
Product data sheet  
1. General description  
The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible  
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC  
standard No. 7-A.  
The 74VHC02; 74VHCT02 provide a quad 2-input NOR function.  
2. Features  
I Balanced propagation delays  
I All inputs have a Schmitt-trigger action  
I Inputs accept voltages higher than VCC  
I Input levels:  
N The 74VHC02 operates with CMOS input level  
N The 74VHCT02 operates with TTL input level  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74VHC02D  
40 °C to +125 °C  
40 °C to +125 °C  
40 °C to +125 °C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74VHCT02D  
74VHC02PW  
74VHCT02PW  
74VHC02BQ  
74VHCT02BQ  
TSSOP14  
plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
SOT402-1  
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1  
thin quad flat package; no leads; 14 terminals;  
body 2.5 × 3 × 0.85 mm  
 
 
 

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