生命周期: | Transferred | 包装说明: | SOP, |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.65 | Is Samacsys: | N |
系列: | AHC/VHC | JESD-30 代码: | R-PDSO-G16 |
长度: | 9.9 mm | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | J-K FLIP-FLOP | 位数: | 2 |
功能数量: | 2 | 端子数量: | 16 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
输出极性: | COMPLEMENTARY | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 传播延迟(tpd): | 12 ns |
认证状态: | Not Qualified | 座面最大高度: | 1.75 mm |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 2 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | INDUSTRIAL |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 触发器类型: | NEGATIVE EDGE |
宽度: | 3.9 mm | 最小 fmax: | 110 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74VHC112MTC | FAIRCHILD |
获取价格 |
Dual J-K Flip-Flops with Preset and Clear | |
74VHC112MTC | TI |
获取价格 |
AHC/VHC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, | |
74VHC112MTC | ONSEMI |
获取价格 |
带预设和清零功能的双通道J-K触发器 | |
74VHC112MTC_NL | FAIRCHILD |
获取价格 |
J-K Flip-Flop, AHC/VHC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Outpu | |
74VHC112MTCX | FAIRCHILD |
获取价格 |
J-K-Type Flip-Flop | |
74VHC112MTCX | ONSEMI |
获取价格 |
带预设和清零功能的双通道J-K触发器 | |
74VHC112MTCX_NL | FAIRCHILD |
获取价格 |
J-K Flip-Flop, AHC/VHC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Outpu | |
74VHC112MX | TI |
获取价格 |
AHC/VHC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, | |
74VHC112MX | ONSEMI |
获取价格 |
带预设和清零功能的双通道J-K触发器 | |
74VHC112MX | FAIRCHILD |
获取价格 |
J-K-Type Flip-Flop |