生命周期: | Obsolete | 零件包装代码: | DIP |
包装说明: | DIP, | 针数: | 14 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.81 | 系列: | S |
JESD-30 代码: | R-PDIP-T14 | 逻辑集成电路类型: | NAND GATE |
功能数量: | 3 | 输入次数: | 3 |
端子数量: | 14 | 最高工作温度: | 70 °C |
最低工作温度: | 封装主体材料: | PLASTIC/EPOXY | |
封装代码: | DIP | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 传播延迟(tpd): | 5 ns |
认证状态: | Not Qualified | 最大供电电压 (Vsup): | 5.25 V |
最小供电电压 (Vsup): | 4.75 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | TTL |
温度等级: | COMMERCIAL | 端子形式: | THROUGH-HOLE |
端子位置: | DUAL | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74S10PC | FAIRCHILD |
获取价格 |
NAND Gate, TTL, PDIP14, | |
74S10PC | NSC |
获取价格 |
IC,LOGIC GATE,3 3-INPUT NAND,S-TTL,DIP,14PIN,PLASTIC | |
74S10PCQM | FAIRCHILD |
获取价格 |
暂无描述 | |
74S10PCQR | ROCHESTER |
获取价格 |
NAND Gate | |
74S11 | ETC |
获取价格 |
TRIPLE 3-INPUT AND GATE | |
74S112B | NXP |
获取价格 |
S SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, PLASTI | |
74S112DC | ETC |
获取价格 |
J-K-Type Flip-Flop | |
74S112DCQM | ROCHESTER |
获取价格 |
J-K Flip-Flop | |
74S112F | NXP |
获取价格 |
IC S SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, CER | |
74S112PC | ETC |
获取价格 |
J-K-Type Flip-Flop |