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74LVX32SJ_08 PDF预览

74LVX32SJ_08

更新时间: 2024-11-15 12:23:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
8页 305K
描述
Low Voltage Quad 2-Input OR Gate

74LVX32SJ_08 数据手册

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February 2008  
74LVX32  
Low Voltage Quad 2-Input OR Gate  
Features  
General Description  
Input voltage level translation from 5V to 3V  
Ideal for low power/low noise 3.3V applications  
The LVX32 contains four 2-input OR gates. The inputs  
tolerate voltages up to 7V allowing the interface of 5V  
systems to 3V systems.  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Ordering Information  
Order  
Number  
Package  
Number  
Package Description  
74LVX32M  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVX32SJ  
74LVX32MTC  
MTC14  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
Connection Diagram  
Logic Symbol  
IEEE/IEC  
Pin Description  
Pin Names  
Description  
A , B  
Inputs  
n
n
O
Outputs  
n
©1993 Fairchild Semiconductor Corporation  
74LVX32 Rev. 1.4.0  
www.fairchildsemi.com  

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