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74LVT162374DL-T PDF预览

74LVT162374DL-T

更新时间: 2024-11-06 21:08:15
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管输出元件
页数 文件大小 规格书
17页 80K
描述
IC LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, 7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48, Bus Driver/Transceiver

74LVT162374DL-T 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SSOP
包装说明:7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.13系列:LVT
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:15.875 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):6.2 ns认证状态:Not Qualified
座面最大高度:2.8 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmBase Number Matches:1

74LVT162374DL-T 数据手册

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74LVT162374  
3.3 V 16-bit edge-triggered D-type flip-flop with 30  
termination resistors; 3-state  
Rev. 03 — 17 January 2005  
Product data sheet  
1. General description  
The 74LVT162374 is a high performance BiCMOS product designed for VCC operation at  
3.3 V.  
The 74LVT162374 is designed with 30 series resistance in both the HIGH and LOW  
states of the output. This design reduces line noise in applications such as memory  
address drivers, clock drivers, and bus receivers/transmitters.  
This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-state  
outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the  
positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels  
set up at the D inputs.  
2. Features  
16-bit edge-triggered flip-flop  
3-state buffers  
Output capability: +12 mA and 12 mA  
TTL input and output switching levels  
Input and output interface capability to systems at 5 V supply  
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused  
inputs  
Live insertion and extraction permitted  
Outputs include series resistance of 30 making external resistors unnecessary  
Power-up reset  
Power-up 3-state  
No bus current loading when output is tied to 5 V bus  
Latch-up protection exceeds 500 mA per JESD78  
ESD protection:  
MIL STD 883 method 3015: exceeds 2000 V  
Machine model: exceeds 200 V  
 
 

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