74LVT16240

更新时间： 2024-11-05 22:56:23

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		驱动器
页数	文件大小	规格书
6页	107K
描述
Low Voltage 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs

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中文翻译

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数据手册

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74LVT16240 数据手册

March 1999

Revised June 2005

74LVT16240 • 74LVTH16240

Low Voltage 16-Bit Inverting Buffer/Line Driver

with 3-STATE Outputs

General Description

Features

■ Input and output interface capability to systems at

The LVT16240 and LVTH16240 contain sixteen inverting

buffers with 3-STATE outputs designed to be employed as

a memory and address driver, clock driver, or bus-oriented

transmitter/receiver. The device is nibble controlled.

5V V_CC

■ Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH16240),

also available without bushold feature (74LVT16240)

Individual 3-STATE control inputs can be shorted together

for 8-bit or 16-bit operation.

■ Live insertion/extraction permitted

The LVTH16240 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

■ Power Up/Down high impedance provides glitch-free

bus loading

■ Outputs source/sink 32 mA/ 64 mA

■ Functionally compatible with the 74 series 16240

■ Latch-up performance exceeds 500 mA

■ ESD performance:

These buffers and line drivers are designed for low-voltage

(3.3V) V_CCapplications, but with the capability to provide a

TTL interface to a 5V environment. The LVT16240 and

LVTH16240 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining a low power dissipation.

Human-body model 2000V

Machine model 200V

Charged-device model 1000V

Ordering Code:

Package

Order Number

Package Description

Number

74LVT16240MEA

74LVT16240MTD

74LVTH16240MEA

74LVTH16240MTD

MS48A

MTD48

MS48A

MTD48

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

DS012025

www.fairchildsemi.com

12 3 4 5 6

中文翻译

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与74LVT16240相关器件

型号	品牌	获取价格	描述	数据表
74LVT16240A	NXP	获取价格	3.3V LVT 16-bit inverting buffer/driver 3-State
74LVT16240A-1DGG	NXP	获取价格	IC LVT SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, Bus Driver/Transceiver
74LVT16240A-1DG-T	NXP	获取价格	IC LVT SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, PLASTIC, TSSOP2-48, Bus Driver/
74LVT16240A-1DL	NXP	获取价格	IC LVT SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, Bus Driver/Transceiver
74LVT16240A-1DL-T	NXP	获取价格	IC LVT SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, Bus Driver/Transceiver
74LVT16240ADG	NXP	获取价格	IC LVT SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, 6.10 MM, PLASTIC, MO-153, SOT-3
74LVT16240ADGG	NXP	获取价格	3.3V LVT 16-bit inverting buffer/driver 3-State
74LVT16240ADGG	NEXPERIA	获取价格	3.3 V 16-bit inverting buffer/driver; 3-stateProduction
74LVT16240ADGG,112	NXP	获取价格	74LVT16240A - 3.3 V LVT 16-bit inverting buffer/driver (3-State) TSSOP 48-Pin
74LVT16240ADGG,512	NXP	获取价格	74LVT16240A - 3.3 V LVT 16-bit inverting buffer/driver (3-State) TSSOP 48-Pin

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