Datasheet > 74LVCH322245AEC,51

74LVCH322245AEC,51

更新时间： 2024-11-05 14:40:15

品牌	Logo	应用领域
恩智浦 - NXP		逻辑集成电路
页数	文件大小	规格书
13页	95K
描述
74LVCH322245A - 32-bit bus transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant; 3-state BGA 96-Pin

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74LVCH322245AEC,51 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	LFBGA, BGA96,6X16,32
针数：	96	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.73
其他特性：	WITH DIRECTION CONTROL	控制类型：	COMMON CONTROL
计数方向：	BIDIRECTIONAL	系列：	LVC/LCX/Z
JESD-30 代码：	R-PBGA-B96	长度：	13.5 mm
负载电容（CL）：	50 pF	逻辑集成电路类型：	BUS TRANSCEIVER
最大I（ol）：	0.012 A	位数：	8
功能数量：	4	端口数量：	2
端子数量：	96	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE WITH SERIES RESISTOR
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFBGA	封装等效代码：	BGA96,6X16,32
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH
包装方法：	TAPE AND REEL	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	3.3 V	Prop。Delay @ Nom-Sup：	8.5 ns
传播延迟（tpd）：	6.7 ns	认证状态：	Not Qualified
座面最大高度：	1.5 mm	子类别：	Bus Driver/Transceivers
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	1.2 V
标称供电电压 (Vsup)：	2.7 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
翻译：	N/A	宽度：	5.5 mm
Base Number Matches：	1

74LVCH322245AEC,51 数据手册

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74LVCH322245A

32-bit bus transceiver with direction pin; 30 Ω series

temination resistors; 5 V tolerant; 3-state

Rev. 03 — 20 August 2007

Product data sheet

1. General description

The 74LVCH322245A is a 32-bit transceiver featuring non-inverting 3-state bus

compatible outputs in both send and receive directions. The device features four output

enable (nOE) inputs for easy cascading and four send/receive (nDIR) inputs for direction

control. Pin nOE controls the outputs so that the buses are effectively isolated. The device

is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to

reduce line noise.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed

3.3 V and 5 V applications.

To ensure the high-impedance state during power-up or power-down, pin nOE should be

tied to V_CCthrough a pull-up resistor; the minimum value of the resistor is determined by

the current-sinking capability of the driver.

Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused

inputs.

2. Features

I 5 V tolerant inputs/outputs for interfacing with 5 V logic

I Wide supply voltage range from 1.2 V to 3.6 V

I CMOS low power consumption

I MULTIBYTE ﬂow-through standard pin-out architecture

I Low inductance multiple power and ground pins for minimum noise and ground

bounce

I Direct interface with TTL levels

I Inputs accept voltages up to 5.5 V

I All data inputs have bus hold

I Integrated 30 Ω termination resistors

I Complies with JEDEC standard JESD8-B / JESD36

I ESD protection:

N HBM EIA/JESD22-A114-B exceeds 2000 V

N MM EIA/JESD22-A115-A exceeds 200 V

I Speciﬁed from −40 °C to +85 °C

I Packaged in plastic ﬁne-pitch ball grid array package

12 3 4 5 6 7...13

中文翻译

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与74LVCH322245AEC,51相关器件

型号	品牌	获取价格	描述	数据表
74LVCH322245AEC/G	NXP	获取价格	IC LVC/LCX/Z SERIES, QUAD 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50, 1.05 MM HE
74LVCH322245AEC/G:	NXP	获取价格	74LVCH322245A - 32-bit bus transceiver with d
74LVCH322245AEC:55	NXP	获取价格	74LVCH322245A - 32-bit bus transceiver with d
74LVCH322245AEC-S	NXP	获取价格	IC LVC/LCX/Z SERIES, QUAD 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50, 1.05 MM HE
74LVCH32244A	NXP	获取价格	32-bit buffer/line driver; 5 V input/output tolerant; 3-state
74LVCH32244ABF	IDT	获取价格	CABGA-96, Tray
74LVCH32244AEC	NXP	获取价格	32-bit buffer/line driver; 5 V input/output tolerant; 3-state
74LVCH32244AEC,518	NXP	获取价格	暂无描述
74LVCH32244AEC,557	NXP	获取价格	74LVCH32244A - 32-bit buffer/line driver; 5 V input/output tolerant; 3-state BGA 96-Pin
74LVCH32244AEC/G,1	NXP	获取价格	74LVCH32244A - 32-bit buffer/line driver; 5 V input/output tolerant; 3-state BGA 96-Pin

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