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74LVCH16646APFG8 PDF预览

74LVCH16646APFG8

更新时间： 2024-11-01 15:26:39
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路电视
页数 文件大小 规格书
8页 118K
描述
Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, GREEN, TVSOP-56

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74LVCH16646APFG8 技术参数

生命周期：Obsolete零件包装代码：SSOP
包装说明：TSSOP,针数：56
Reach Compliance Code：unknown风险等级：5.83
系列：LVC/LCX/ZJESD-30 代码：R-PDSO-G56
JESD-609代码：e3长度：11.3 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：8
功能数量：2端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟（tpd）：7.9 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
宽度：4.4 mmBase Number Matches：1

74LVCH16646APFG8 数据手册

 浏览型号74LVCH16646APFG8的Datasheet PDF文件第2页浏览型号74LVCH16646APFG8的Datasheet PDF文件第3页浏览型号74LVCH16646APFG8的Datasheet PDF文件第4页浏览型号74LVCH16646APFG8的Datasheet PDF文件第5页浏览型号74LVCH16646APFG8的Datasheet PDF文件第6页浏览型号74LVCH16646APFG8的Datasheet PDF文件第7页 
IDT74LVCH16646A  
3.3V CMOS 16-BIT BUS  
TRANSCEIVER/REGISTER  
WITH 3-STATE OUTPUTS,  
5 VOLT TOLERANT I/O AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• Typical tSK(o) (Output Skew) < 250ps  
The LVCH16646A 16-bit bus transceiver and register is built using  
advanced dual metal CMOS technology. This high-speed, low power  
device is organizedas twoindependent8-bitD-type transceivers with3-  
state D-type registers.The controls circuitry is organized for multiplexed  
transmission of data between A bus and B bus either directly or from the  
internalstorageregisters.Each8-bittransceiver/registerfeaturesdirection  
control(DIR),over-ridingOutputEnablecontrol(OE)andSelectlines(SAB  
andSBA)toselecteitherreal-timedataorstoreddata.Separateclockinputs  
areprovidedforAandBportregisters.DataontheAorBdatabus,orboth,  
canbe storedinthe internalregisters bythe low-to-hightransitions atthe  
appropriateclockpins.Flow-throughorganizationofsignalpins simplifies  
layout.Allinputs are designedwithhysteresis forimprovednoise margin.  
Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows  
the use of this device as a translator in a mixed 3.3V/5V supply system.  
TheLVCH16646Ahas beendesignedwitha ±24mAoutputdriver.This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4μ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Supports hot insertion  
• Available in TSSOP and TVSOP packages  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Reduced system switching noise  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
The LVCH16646A has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs  
andeliminates the needforpull-up/downresistors.  
FUNCTIONALBLOCKDIAGRAM  
29  
56  
2OE  
1OE  
1
28  
1DIR  
2DIR  
30  
55  
2CLKBA  
1CLKBA  
54  
31  
27  
2SBA  
1SBA  
2
2CLKAB  
1CLKAB  
3
26  
2SAB  
2A1  
1SAB  
1D  
C1  
1D  
One of Eight Channels  
C1  
One of Eight Channels  
1A1 5  
1B1  
15  
42  
52  
2B1  
1D  
C1  
1D  
C1  
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JUNE 2006  
1
© 2006 Integrated Device Technology, Inc.  
DSC-3787/4  
12345678

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