Datasheet > 74LVCH1T45GW

74LVCH1T45GW

更新时间： 2024-11-05 11:11:51

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
30页	381K
描述
Dual supply translating transceiver; 3-stateProduction

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74LVCH1T45GW 数据手册

74LVC1T45; 74LVCH1T45

Dual supply translating transceiver; 3-state

Rev. 9 — 10 February 2022

Product data sheet

1. General description

The 74LVC1T45; 74LVCH1T45 are single bit, dual supply transceivers with 3-state outputs

that enable bidirectional level translation. They feature two 1-bit input-output ports (A and B), a

direction control input (DIR) and dual supply pins (V_CC(A)and V_CC(B)). Both V_CC(A)and V_CC(B)can

be supplied at any voltage between 1.2 V and 5.5 V making the device suitable for translating

between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and DIR

are referenced to V_CC(A)and pin B is referenced to V_CC(B). A HIGH on DIR allows transmission

from A to B and a LOW on DIR allows transmission from B to A.

The devices are fully specified for partial power-down applications using I_OFF. The I_OFF

circuitry disables the output, preventing any damaging backflow current through the device

when it is powered down. In suspend mode when either V_CC(A)or V_CC(B)are at GND level,

both A port and B port are in the high-impedance OFF-state.

Active bus hold circuitry in the 74LVCH1T45 holds unused or floating data inputs at a valid logic

level.

2. Features and benefits

•

Wide supply voltage range:

•

V_CC(A): 1.2 V to 5.5 V

V_CC(B): 1.2 V to 5.5 V

•

High noise immunity

Maximum data rates:

•

420 Mbps (3.3 V to 5.0 V translation)

210 Mbps (translate to 3.3 V))

140 Mbps (translate to 2.5 V)

75 Mbps (translate to 1.8 V)

60 Mbps (translate to 1.5 V)

•

Suspend mode

Latch-up performance exceeds 100 mA per JESD 78 Class II

±24 mA output drive (V_CC= 3.0 V)

Inputs accept voltages up to 5.5 V

Low power consumption: 16 μA maximum I_CC

I_OFFcircuitry provides partial Power-down mode operation

Complies with JEDEC standards:

•

JESD8-7 (1.2 V to 1.95 V)

JESD8-5 (1.8 V to 2.7 V)

JESD8C (2.7 V to 3.6 V)

JESD36 (4.5 V to 5.5 V)

•

ESD protection:

•

HBM JESD22-A114F Class 3A exceeds 4000 V

CDM JESD22-C101E exceeds 1000 V

•

Multiple package options

Specified from -40 °C to +85 °C and -40 °C to +125 °C

12 3 4 5 6 7...30

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与74LVCH1T45GW相关器件

型号	品牌	获取价格	描述	数据表
74LVCH1T45GW-Q100	NEXPERIA	获取价格	Dual supply translating transceiver; 3-state
74LVCH1T45-Q100	NEXPERIA	获取价格	Dual supply translating transceiver; 3-state
74LVCH2240AD	ETC	获取价格	Dual 4-Bit Inverting Buffer/Driver
74LVCH2240ADB	ETC	获取价格	Dual 4-Bit Inverting Buffer/Driver
74LVCH2240ADB-T	NXP	获取价格	IC LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, Bus Driver/Transceiver
74LVCH2240APG	IDT	获取价格	Bus Driver, LVC/LCX/Z Series, 2-Func, 4-Bit, Inverted Output, CMOS, PDSO20, 0.65 MM PITCH,
74LVCH2240APW	ETC	获取价格	Dual 4-Bit Inverting Buffer/Driver
74LVCH2240APW-T	NXP	获取价格	IC LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, Bus Driver/Transceiver
74LVCH2240AQ	IDT	获取价格	Bus Driver, LVC/LCX/Z Series, 2-Func, 4-Bit, Inverted Output, CMOS, PDSO20, 0.635 MM PITCH
74LVCH2241AD	ETC	获取价格	Dual 4-Bit Non-Inverting Buffer/Driver

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