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74LVC245ADB,112 PDF预览

74LVC245ADB,112

更新时间: 2024-11-11 15:29:43
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
18页 137K
描述
74LVC(H)245A - Octal bus transceiver; 3-state SSOP2 20-Pin

74LVC245ADB,112 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SSOP2包装说明:5.30 MM, PLASTIC, MO-150, SOT339-1, SSOP-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:7.23
其他特性:WITH DIRECTION CONTROL控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:7.2 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:8 ns
传播延迟(tpd):9.5 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30翻译:N/A
宽度:5.3 mmBase Number Matches:1

74LVC245ADB,112 数据手册

 浏览型号74LVC245ADB,112的Datasheet PDF文件第2页浏览型号74LVC245ADB,112的Datasheet PDF文件第3页浏览型号74LVC245ADB,112的Datasheet PDF文件第4页浏览型号74LVC245ADB,112的Datasheet PDF文件第5页浏览型号74LVC245ADB,112的Datasheet PDF文件第6页浏览型号74LVC245ADB,112的Datasheet PDF文件第7页 
74LVC245A; 74LVCH245A  
Octal bus transceiver; 3-state  
Rev. 8 — 28 June 2013  
Product data sheet  
1. General description  
The 74LVC245A; 74LVCH245A are 8-bit transceivers featuring non-inverting 3-state bus  
compatible outputs in both send and receive directions. The device features an output  
enable (OE) input for easy cascading and a send/receive (DIR) input for direction control.  
OE controls the outputs so that the buses are effectively isolated.  
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be  
applied to the outputs. These features allow the use of these devices in mixed  
3.3 V and 5 V applications.  
The 74LVCH245A bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
2. Features and benefits  
5 V tolerant inputs/outputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low-power consumption  
Direct interface with TTL levels  
Inputs accept voltages up to 5.5 V  
High-impedance when VCC = 0 V  
Bus hold on all data inputs (74LVCH245A only)  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 

74LVC245ADB,112 替代型号

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