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74LVC1G126GS PDF预览

74LVC1G126GS

更新时间: 2024-11-24 12:29:11
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
21页 368K
描述
Bus buffer/line driver; 3-state

74LVC1G126GS 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SON包装说明:1 X 1 MM, 0.35 MM HEIGHT, 0.35 MM PITCH, SOT-1202, SON-6
针数:6Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.56
系列:LVC/LCX/ZJESD-30 代码:S-PDSO-N6
JESD-609代码:e3长度:1 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:1功能数量:1
端口数量:2端子数量:6
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装形状:SQUARE封装形式:SMALL OUTLINE, VERY THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):10.5 ns
认证状态:Not Qualified座面最大高度:0.35 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:TIN端子形式:NO LEAD
端子节距:0.35 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1 mm
Base Number Matches:1

74LVC1G126GS 数据手册

 浏览型号74LVC1G126GS的Datasheet PDF文件第2页浏览型号74LVC1G126GS的Datasheet PDF文件第3页浏览型号74LVC1G126GS的Datasheet PDF文件第4页浏览型号74LVC1G126GS的Datasheet PDF文件第5页浏览型号74LVC1G126GS的Datasheet PDF文件第6页浏览型号74LVC1G126GS的Datasheet PDF文件第7页 
74LVC1G126  
Bus buffer/line driver; 3-state  
Rev. 12 — 2 July 2012  
Product data sheet  
1. General description  
The 74LVC1G126 provides one non-inverting buffer/line driver with 3-state output. The  
3-state output is controlled by the output enable input (OE). A LOW-level at pin OE  
causes the output to assume a high-impedance OFF-state.  
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of  
this device in a mixed 3.3 V and 5 V environment.  
This device is fully specified for partial power-down applications using IOFF. The IOFF  
circuitry disables the output, preventing the damaging backflow current through the device  
when it is powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V)  
24 mA output drive (VCC = 3.0 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CMOS low power consumption  
Inputs accept voltages up to 5 V  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C  

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