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74LVC1G123DC PDF预览

74LVC1G123DC

更新时间: 2024-11-06 11:11:31
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
24页 326K
描述
Single retriggerable monostable multivibrator; Schmitt trigger inputsProduction

74LVC1G123DC 数据手册

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74LVC1G123  
Single retriggerable monostable multivibrator;  
Schmitt trigger inputs  
Rev. 7 — 20 April 2021  
Product data sheet  
1. General description  
The 74LVC1G123 is a single retriggerable monostable multivibrator with Schmitt trigger inputs.  
Output pulse width is controlled by three methods:  
1. The basic pulse is programmed by selection of an external resistor (REXT) and capacitor (CEXT).  
2. Once triggered, the basic output pulse width may be extended by retriggering the gated active  
LOW-going edge input (A) or the active HIGH-going edge input (B). By repeating this process,  
the output pulse period (Q = HIGH) can be made as long as desired. Alternatively an output  
delay can be terminated at any time by a LOW-going edge on input CLR, which also inhibits the  
triggering.  
3. An internal connection from CLR to the input gates makes it possible to trigger the circuit by a  
HIGH-going signal at input CLR.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices  
as translators in a mixed 3.3 V and 5 V environment. Schmitt trigger inputs, makes the circuit highly  
tolerant to slower input rise and fall times.  
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing the damaging backflow current through the device when it is  
powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
High noise immunity  
±24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
DC triggered from active HIGH or active LOW inputs  
Retriggerable for very long pulses up to 100 % duty factor  
Direct reset terminates output pulse  
Schmitt trigger on all inputs  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8-B/JESD36 (2.7 V to 3.6 V)  
Power-on-reset on outputs  
Latch-up performance exceeds 100 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5.5 V  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 

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