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74LVC14APW-Q100 PDF预览

74LVC14APW-Q100

更新时间: 2024-11-17 20:07:55
品牌 Logo 应用领域
恩智浦 - NXP 输入元件光电二极管逻辑集成电路
页数 文件大小 规格书
17页 142K
描述
LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14

74LVC14APW-Q100 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.6
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
逻辑集成电路类型:INVERTER湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):14.7 ns筛选级别:AEC-Q100
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74LVC14APW-Q100 数据手册

 浏览型号74LVC14APW-Q100的Datasheet PDF文件第2页浏览型号74LVC14APW-Q100的Datasheet PDF文件第3页浏览型号74LVC14APW-Q100的Datasheet PDF文件第4页浏览型号74LVC14APW-Q100的Datasheet PDF文件第5页浏览型号74LVC14APW-Q100的Datasheet PDF文件第6页浏览型号74LVC14APW-Q100的Datasheet PDF文件第7页 
74LVC14A-Q100  
Hex inverting Schmitt trigger with 5 V tolerant input  
Rev. 1 — 7 August 2012  
Product data sheet  
1. General description  
The 74LVC14A-Q100 provides six inverting buffers with Schmitt trigger input. It is capable  
of transforming slowly changing input signals into sharply defined, jitter-free output  
signals.  
The inputs switch at different points for positive and negative-going signals. The difference  
between the positive voltage VT+ and the negative voltage VTis defined as the input  
hysteresis voltage VH.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this  
device as a translator in mixed 3.3 V and 5 V applications.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Wide supply voltage range from 1.2 V to 3.6 V  
5 V tolerant input for interfacing with 5 V logic  
CMOS low-power consumption  
Direct interface with TTL levels  
Unlimited input rise and fall times  
Inputs accept voltages up to 5.5 V  
Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Applications  
Wave and pulse shapers for highly noisy environments  
Astable multivibrators  
Monostable multivibrators  
 
 
 

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