5秒后页面跳转
74LVC157ADB,118 PDF预览

74LVC157ADB,118

更新时间: 2024-11-21 03:48:07
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
17页 280K
描述
74LVC157A - Quad 2-input multiplexer SSOP1 16-Pin

74LVC157ADB,118 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SSOP1包装说明:SSOP, SSOP16,.3
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.34
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:6.2 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:6.5 ns
传播延迟(tpd):7.5 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.3 mm

74LVC157ADB,118 数据手册

 浏览型号74LVC157ADB,118的Datasheet PDF文件第2页浏览型号74LVC157ADB,118的Datasheet PDF文件第3页浏览型号74LVC157ADB,118的Datasheet PDF文件第4页浏览型号74LVC157ADB,118的Datasheet PDF文件第5页浏览型号74LVC157ADB,118的Datasheet PDF文件第6页浏览型号74LVC157ADB,118的Datasheet PDF文件第7页 
74LVC157A  
Quad 2-input multiplexer  
Rev. 7 — 25 November 2011  
Product data sheet  
1. General description  
The 74LVC157A is a quad 2-input multiplexer which select four bits of data from two  
sources under the control of a common select input (S). The four outputs present the  
selected data in the true (non-inverted) form. The enable input (E) is active LOW. When  
pin E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all the other  
input conditions. Moving the data from two groups of registers to four common output  
buses is a common use of the 74LVC157A. The state of the common data select input (S)  
determines the particular register from which the data comes. It can also be used as  
function generator.  
It is useful for implementing highly irregular logic by generating any 4 of the 16 different  
functions of two variables with one variable common.  
The device is the logic implementation of a 4-pole, 2-position switch, where the position of  
the switch is determined by the logic levels applied to pin S.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these  
devices as translators in mixed 3.3 V and 5 V applications.  
2. Features and benefits  
5 V tolerant inputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low power consumption  
Direct interface with TTL levels  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Specified from 40 C to +85 C and 40 C to +125 C  

74LVC157ADB,118 替代型号

型号 品牌 替代类型 描述 数据表
74LVC157ADB NXP

完全替代

Quad 2-input multiplexer
SN74LVC157ADB TI

类似代替

QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER

与74LVC157ADB,118相关器件

型号 品牌 获取价格 描述 数据表
74LVC157ADB-Q100 NEXPERIA

获取价格

Quad 2-input multiplexer
74LVC157ADB-T ETC

获取价格

2-Input Digital Multiplexer
74LVC157AD-Q100 NEXPERIA

获取价格

Quad 2-input multiplexer
74LVC157AD-T ETC

获取价格

2-Input Digital Multiplexer
74LVC157APG IDT

获取价格

3.3V CMOS QUAD 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER, 5 VOLT TOLERANT I/O
74LVC157APW NXP

获取价格

Quad 2-input multiplexer
74LVC157APW NEXPERIA

获取价格

Quad 2-input multiplexerProduction
74LVC157APW,118 NXP

获取价格

74LVC157A - Quad 2-input multiplexer TSSOP 16-Pin
74LVC157APWDH NXP

获取价格

Quad 2-input multiplexer
74LVC157APWDH-T NXP

获取价格

暂无描述