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74LCXZR163245MTDX PDF预览

74LCXZR163245MTDX

更新时间： 2024-01-31 18:53:16
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 72K
描述
Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 6.10 MM, MO-153, TSSOP-48

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74LCXZR163245MTDX 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：6.10 MM, MO-153, TSSOP-48
针数：48Reach Compliance Code：unknown
风险等级：5.76Is Samacsys：N
其他特性：ALSO REQUIRES 3V TO 5.5V SUPPLY控制类型：COMMON CONTROL
计数方向：BIDIRECTIONAL系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-G48JESD-609代码：e0
长度：12.5 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS TRANSCEIVER最大I（ol）：0.012 A
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
Prop。Delay @ Nom-Sup：7.5 ns传播延迟（tpd）：7.5 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：3V & 5V宽度：6.1 mm
Base Number Matches：1

74LCXZR163245MTDX 数据手册

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Preliminary  
May 2001  
Revised May 2001  
74LCXZR163245  
16-Bit Dual Supply Translating Transceiver  
with 3-STATE Outputs  
and 26ΩSeries Resistors in Outputs (Preliminary)  
designed so that the control pins (T/Rn, OEn) are powered  
General Description  
by VCCB, so that VCCA may be removed when the I/Os are  
disabled.  
The 74LCXZR163245 is a dual supply, 16-bit, translating  
transceiver that is designed for two-way asynchronous  
communication between busses at different supply volt-  
ages. This device is suited for PCMCIA and other real-time  
configurable I/O applications that utilize mixed power sup-  
plies.  
The 74LCXZR163245 is suitable for mixed voltage applica-  
tions such as notebook computers using a 3.3V CPU and  
5.0V peripheral components. It is fabricated with an  
Advanced CMOS technology to achieve high speed opera-  
tion while maintaining low CMOS power dissipation.  
The 74LCXZR163245 is designed to Power-Up and  
Power-Down into a High Impedance state (outputs dis-  
abled). The feature eliminates the need to power-up in a  
specific sequence to avoid drawing excessive current.  
Features  
■ Bidirectional interface between 3V busses and  
The A Port interfaces with the higher voltage bus (3.0V to  
5.5V), and the B Port interfaces with the lower voltage bus  
(2.3V to 3.6V). This dual supply design allows for transla-  
tion from low voltage busses (2.3V to 3.6V) to busses at a  
higher potential, up to 5.5V. The 74LCXZR163245 is  
intended to be used in applications where the A Port is con-  
nected to the PCMCIA card slots, and the B Port is con-  
nected to the 3.0V host system.  
5V busses  
■ Supports live insertion and withdrawal (Note 1)  
■ Outputs source/sink up to 12 mA  
■ All outputs include nominal 26Ω series resistors  
■ Uses patented Quiet Series noise/EMI reduction  
circuitry  
■ Functionally compatible with the 74 series 16245  
■ Port A I/O may be disabled by use of OEn or removal of  
A Port VCC  
Furthermore, when both OE’s are HIGH, the A Port I/O pins  
are disabled, and both A Port I/O connections and A Port  
VCC are allowed to float. This feature permits PCMCIA  
■ Port A VCC may be removed when OEn is used to  
disable I/O’s  
cards to be inserted and removed during normal operation.  
All A and B I/O include nominal 26Ω series resistors to  
reduce overshoot and undershoot.  
■ Port A VCC removal may occur coincident with rising  
edge of OEn  
The Transmit/Receive (T/R) input determines the direction  
of data flow. Transmit (active-HIGH) enables data from A  
Ports to B Ports; Receive (active-LOW) enables data from  
B Ports to A Ports. The Output Enable (OE1, OE2) inputs,  
■ Configurable as one 16-bit or two 8-bit transceivers  
■ Unrestricted power-up sequencing  
Note 1: To ensure the high-impedance state during power up or down, OE  
when HIGH, disable their associated ports by placing the  
I/Os in HIGH-Z condition. The 74LCXZR163245 is  
should be tied to VCC through a pull-up resistor; the minimum value or the  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCXZR163245MTD  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Quiet Series is a trademark of Fairchild Semiconductor Corporation.  
© 2001 Fairchild Semiconductor Corporation  
DS500383  
www.fairchildsemi.com  
1234567

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