Datasheet > 74LCXZR164245MTDX

74LCXZR164245MTDX

更新时间： 2024-09-24 23:24:19

品牌	Logo	应用领域
其他 - ETC		总线收发器
页数	文件大小	规格书
7页	76K
描述
Dual 8-bit Bus Transceiver

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Preliminary

May 2001

Revised May 2001

74LCXZR164245

16-Bit Dual Supply Translating Transceiver

with 3-STATE Outputs

and 26Ω Series Resistors in the Outputs (Preliminary)

designed so that the control pins (T/R_n, OE_n) are powered

General Description

by V_CCA, so that V_CCBmay be removed when the I/Os are

The 74LCXZR164245 is a dual supply, 16-bit, translating

disabled.

transceiver that is designed for two-way asynchronous

The 74LCXZR164245 is suitable for mixed voltage applica-

tions such as notebook computers using a 3.3V CPU and

5.0V peripheral components. It is fabricated with an

Advanced CMOS technology to achieve high speed opera-

tion while maintaining low CMOS power dissipation.

communication between busses at different supply volt-

ages. This device is suited for PCMCIA and other real-time

configurable I/O applications that utilize mixed power sup-

plies.

The 74LCXZR164245 is designed to Power-Up and

Power-Down into a High Impedance state (outputs dis-

abled). The feature eliminates the need to power-up in a

specific sequence to avoid drawing excessive current.

Features

■ Bidirectional interface between 3V busses and

The A Port interfaces with the lower voltage bus (2.3V to

2.6V), and the B Port interfaces with the higher voltage bus

(2.0V to 5.5V). This dual supply design allows for transla-

tion from low voltage busses (2.3V to 3.6V) to busses at a

higher potential, up to 5.5V. The 74LCXZR164245 is

intended to be used in applications where the A Port is con-

nected to the 3.0V host system, and the B Port is con-

nected to the PCMCIA card slots.

5V busses

■ Supports live insertion and withdrawal (Note 1)

■ Outputs source/sink up to 12 mA

■ All outputs include nominal 26Ω series resistors

■ Uses patented Quiet Series noise/EMI reduction

circuitry

■ Functionally compatible with the 74 series 16245

■ Port B I/O may be disabled by use of OE_nor removal of

B Port V_CC

Furthermore, when both OE’s are HIGH, the B Port I/O pins

are disabled, and both B Port I/O connections and B Port

V_CCare allowed to float. This feature permits PCMCIA

■ Port B V_CCmay be removed when OE_nis used to

disable I/O’s

cards to be inserted and removed during normal operation.

All A and B I/O include nominal 26Ω series resistors to

reduce overshoot and undershoot.

■ Port B V_CCremoval may occur coincident with rising

edge of OE_n

The Transmit/Receive (T/R) input determines the direction

of data flow. Transmit (active-HIGH) enables data from A

Ports to B Ports; Receive (active-LOW) enables data from

B Ports to A Ports. The Output Enable (OE₁, OE₂) inputs,

■ Configurable as one 16-bit or two 8-bit transceivers

■ Unrestricted power-up sequencing

Note 1: To ensure the high-impedance state during power up or down, OE

when HIGH, disable their associated ports by placing the

I/Os in HIGH-Z condition. The 74LCXZR164245 is

should be tied to V_CCthrough a pull-up resistor; the minimum value or the

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Package

Order Number

Package Description

Number

74LCXZR164245MTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Quiet Series is a trademark of Fairchild Semiconductor Corporation.

DS500395

www.fairchildsemi.com

12 3 4 5 6 7

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