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74LCX11M PDF预览

74LCX11M

更新时间: 2024-11-03 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
11页 529K
描述
Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

74LCX11M 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.33
Is Samacsys:N系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:8.6235 mm负载电容(CL):50 pF
逻辑集成电路类型:AND GATE最大I(ol):0.024 A
湿度敏感等级:1功能数量:3
输入次数:3端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:RAIL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:6 ns传播延迟(tpd):7.2 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.753 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

74LCX11M 数据手册

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April 1995  
Revised July 2005  
74LCX11  
Low Voltage Triple 3-Input AND Gate  
with 5V Tolerant Inputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX11 is a triple 3-input AND gate with buffered out-  
puts. LCX devices are designed for low voltage (2.5V or  
3.3V) operation with the added capability of interfacing to a  
5V signal environment.  
2.3V–3.6V VCC specifications provided  
6.0ns tPD max (VCC 3.3V), 10 A ICC max  
Power down high impedance inputs and outputs  
The 74LCX11 is fabricated with advanced CMOS technol-  
ogy to achieve high speed operation while maintaining  
CMOS low power dissipation.  
24 mA output drive (VCC 3.0V)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds JEDEC 78 conditions  
ESD performance:  
Human body model 2000V  
Machine model 200V  
Leadless DQFN Package  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX11M  
M14A  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74LCX11MX_NL  
(Note 1)  
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74LCX11SJ  
M14D  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX11BQX  
(Note 2)  
MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC  
MO-241, 2.5 x 3.0mm  
74LCX11MTC  
MTC14  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX11MTCX_NL  
(Note 1)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: _NLindicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Note 2: DQFN package available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS012426  
www.fairchildsemi.com  

74LCX11M 替代型号

型号 品牌 替代类型 描述 数据表
74LCX11SJ FAIRCHILD

完全替代

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

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