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74HCT595PW PDF预览

74HCT595PW

更新时间: 2024-11-17 11:10:39
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
21页 322K
描述
8-bit serial-in, serial or parallel-out shift register with output latches; 3-stateProduction

74HCT595PW 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.15
其他特性:SERIAL STANDARD OUTPUT FOR CASCADING计数方向:RIGHT
系列:HCTJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
逻辑集成电路类型:SERIAL IN PARALLEL OUT湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):63 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:4.4 mm
最小 fmax:20 MHzBase Number Matches:1

74HCT595PW 数据手册

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74HC595; 74HCT595  
8-bit serial-in, serial or parallel-out shift register with output  
latches; 3-state  
Rev. 11 — 10 September 2021  
Product data sheet  
1. General description  
The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage  
register and 3-state outputs. Both the shift and storage register have separate clocks. The device  
features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous  
reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH  
transitions of the SHCP input. The data in the shift register is transferred to the storage register  
on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift  
register will always be one clock pulse ahead of the storage register. Data in the storage register  
appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the  
outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the  
state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors  
to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 to 6.0 V  
CMOS low power dissipation  
High noise immunity  
8-bit serial input  
8-bit serial or parallel output  
Storage register with 3-state outputs  
Shift register with direct clear  
100 MHz (typical) shift out frequency  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B  
Complies with JEDEC standards:  
JESD8C (2.7 V to 3.6 V)  
JESD7A (2.0 V to 6.0 V)  
Input levels:  
For 74HC595: CMOS level  
For 74HCT595: TTL level  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Applications  
Serial-to-parallel data conversion  
Remote control holding register  
 
 
 

74HCT595PW 替代型号

型号 品牌 替代类型 描述 数据表
74HCT595PW,118 NXP

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74HCT595PW-T NXP

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