Datasheet > 74HCT597D-Q100

74HCT597D-Q100

更新时间： 2024-11-17 11:01:31

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
20页	781K
描述
8-bit shift register with input flip-flopsProduction

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74HCT597D-Q100 数据手册

74HC597-Q100; 74HCT597-Q100

8-bit shift register with input flip-flops

Rev. 1 — 26 May 2014

Product data sheet

1. General description

The 74HC597-Q100; 74HCT597-Q100 is an 8-bit shift register with input flip-flops. It

consists of an 8-bit storage register feeding a parallel-in, serial-out 8-bit shift register. Both

the storage register and the shift register have positive edge-triggered clocks. The shift

that enable the use of current limiting resistors to interface inputs to voltages in excess of

V_CC

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Complies with JEDEC standard JESD7A

 Input levels:

 For 74HC597-Q100: CMOS level

 For 74HCT597-Q100: TTL level

 8-bit parallel storage register inputs

 Shift register has direct overriding load and clear

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Multiple package options

3. Ordering information

Table 1.

Ordering information

Type number

Package

Temperature range Name

Description

Version

74HC597D-Q100

74HCT597D-Q100

40 C to +125 C

SO16

plastic small outline package; 16 leads; body width SOT109-1

3.9 mm

74HC597PW-Q100 40 C to +125 C

TSSOP16

plastic thin shrink small outline package; 16 leads; SOT403-1

body width 4.4 mm

12 3 4 5 6 7...20

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