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74HCT595PW,112 PDF预览

74HCT595PW,112

更新时间: 2024-11-16 14:40:15
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
24页 375K
描述
74HC(T)595 - 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state TSSOP 16-Pin

74HCT595PW,112 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.24
其他特性:SERIAL STANDARD OUTPUT FOR CASCADING计数方向:RIGHT
系列:HCTJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
逻辑集成电路类型:SERIAL IN PARALLEL OUT最大频率@ Nom-Sup:20000000 Hz
湿度敏感等级:1位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 V传播延迟(tpd):63 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Shift Registers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:4.4 mm
最小 fmax:20 MHzBase Number Matches:1

74HCT595PW,112 数据手册

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74HC595; 74HCT595  
8-bit serial-in, serial or parallel-out shift register with output  
latches; 3-state  
Rev. 6 — 12 December 2011  
Product data sheet  
1. General description  
The 74HC595; 74HCT595 are high-speed Si-gate CMOS devices and are pin compatible  
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC  
standard No. 7A.  
The 74HC595; 74HCT595 are 8-stage serial shift registers with a storage register and  
3-state outputs. The registers have separate clocks.  
Data is shifted on the positive-going transitions of the shift register clock input (SHCP).  
The data in each register is transferred to the storage register on a positive-going  
transition of the storage register clock input (STCP). If both clocks are connected together,  
the shift register will always be one clock pulse ahead of the storage register.  
The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading.  
It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The  
storage register has 8 parallel 3-state bus driver outputs. Data in the storage register  
appears at the output whenever the output enable input (OE) is LOW.  
2. Features and benefits  
8-bit serial input  
8-bit serial or parallel output  
Storage register with 3-state outputs  
Shift register with direct clear  
100 MHz (typical) shift out frequency  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Applications  
Serial-to-parallel data conversion  
Remote control holding register  
 
 
 

74HCT595PW,112 替代型号

型号 品牌 替代类型 描述 数据表
74HCT595PW,118 NXP

完全替代

74HC(T)595 - 8-bit serial-in, serial or parallel-out shift register with output latches; 3
74HCT595PW NXP

完全替代

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

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