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74HCT594D-Q100,118 PDF预览

74HCT594D-Q100,118

更新时间: 2024-11-26 20:02:47
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
24页 201K
描述
74HC(T)594-Q100 - 8-bit shift register with output register SOP 16-Pin

74HCT594D-Q100,118 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SOP包装说明:3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16
针数:16Reach Compliance Code:compliant
风险等级:5.75Base Number Matches:1

74HCT594D-Q100,118 数据手册

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74HC594-Q100; 74HCT594-Q100  
8-bit shift register with output register  
Rev. 1 — 2 August 2012  
Product data sheet  
1. General description  
The 74HC594-Q100; 74HCT594-Q100 is a high-speed Si-gate CMOS device and is pin  
compatible with Low-Power Schottky TTL (LSTTL).  
The 74HC594-Q100; 74HCT594-Q100 is an 8-bit, non-inverting, serial-in, parallel-out shift  
register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP)  
and direct overriding clears (SHR and STR) are provided on both the shift and storage  
registers. A serial output (Q7S) is provided for cascading purposes.  
Both the shift and storage register clocks are positive-edge triggered. If both clocks are  
connected together, the shift register is always one count pulse ahead of the storage  
register.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Synchronous serial input and output  
Complies with JEDEC standard No.7A  
8-bit parallel output  
Shift and storage registers have independent direct clear and clocks  
Independent clocks for shift and storage registers  
100 MHz (typical)  
Multiple package options  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
3. Applications  
Serial-to parallel data conversion  
Remote control holding register  
 
 
 

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