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74HCT138D,652 PDF预览

74HCT138D,652

更新时间: 2024-01-13 07:55:39
品牌 Logo 应用领域
恩智浦 - NXP 驱动输入元件光电二极管逻辑集成电路
页数 文件大小 规格书
19页 148K
描述
74HC(T)138 - 3-to-8 line decoder/demultiplexer; inverting SOP 16-Pin

74HCT138D,652 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SOP包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:6.88其他特性:3 ENABLE INPUTS
系列:HCT输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.004 A
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TUBE
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:53 ns传播延迟(tpd):53 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

74HCT138D,652 数据手册

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74HC138; 74HCT138  
3-to-8 line decoder/demultiplexer; inverting  
Rev. 4 — 27 June 2012  
Product data sheet  
1. General description  
The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible  
with Low-power Schottky TTL (LSTTL).  
The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1  
and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).  
The 74HC138; 74HCT138 features three enable inputs: two active LOW (E1 and E2) and  
one active HIGH (E3). Every output is HIGH unless E1 and E2 are LOW and E3 is HIGH.  
This multiple enable function allows easy parallel expansion of the 74HC138; 74HCT138  
to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138; 74HCT138 ICs and one  
inverter.  
The 74HC138; 74HCT138 can be used as an eight output demultiplexer by using one of  
the active LOW enable inputs as the data input and the remaining enable inputs as  
strobes. Permanently tie unused enable inputs to their appropriate active HIGH- or  
LOW-state.  
The 74HC138; 74HCT138 is identical to the 74HC238; 74HCT238 but has inverting  
outputs.  
2. Features and benefits  
Demultiplexing capability  
Multiple input enable for easy expansion  
Complies with JEDEC standard no. 7A  
Ideal for memory chip select decoding  
Active LOW mutually exclusive outputs  
ESD protection:  
HBM EIA/JESD22-A114F exceeds 2000 V  
MM EIA/JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
 
 

74HCT138D,652 替代型号

型号 品牌 替代类型 描述 数据表
CD74HCT138M TI

功能相似

High Speed CMOS Logic 3-to-8 Line Decoder/ Demultiplexer Inverting and Non-Inverting
CD74HCT138E TI

功能相似

High Speed CMOS Logic 3-to-8 Line Decoder/ Demultiplexer Inverting and Non-Inverting

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