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74HCT11PW PDF预览

74HCT11PW

更新时间: 2024-11-07 11:11:43
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
11页 224K
描述
Triple 3-input AND gateProduction

74HCT11PW 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.62
Is Samacsys:N系列:HCT
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm逻辑集成电路类型:AND GATE
湿度敏感等级:1功能数量:3
输入次数:3端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):36 ns
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74HCT11PW 数据手册

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74HC11; 74HCT11  
Triple 3-input AND gate  
Rev. 8 — 11 August 2021  
Product data sheet  
1. General description  
The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the  
use of current limiting resistors to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 to 6.0 V  
CMOS low power dissipation  
High noise immunity  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B  
Input levels:  
For 74HC11: CMOS level  
For 74HCT11: TTL level  
Complies with JEDEC standards:  
JESD8C (2.7 V to 3.6 V)  
JESD7A (2.0 V to 6.0 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number Package  
Temperature range Name  
Description  
Version  
74HC11D  
-40 °C to +125 °C  
-40 °C to +125 °C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74HCT11D  
74HC11PW  
74HCT11PW  
TSSOP14 plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
SOT402-1  
 
 
 

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