74HC573BQ,115 PDF预览

74HC573BQ,115

更新时间: 2025-09-25 19:14:43
品牌 Logo 应用领域
安世 - NEXPERIA 锁存器
页数 文件大小 规格书
20页 815K
描述
类型:D 型透明锁存器;元器件封装:20-DHVQFN(4.5x2.5);

74HC573BQ,115 技术参数

生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:1.15Samacsys Confidence:2
Samacsys Status:ReleasedSamacsys PartID:786129
Samacsys Pin Count:21Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:DHVQFN20 (SOT764-1)
Samacsys Released Date:2019-11-12 07:41:52Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PQCC-N20
JESD-609代码:e4长度:4.5 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):225 ns
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:2.5 mm
Base Number Matches:1

74HC573BQ,115 数据手册

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74HC573; 74HCT573  
Octal D-type transparent latch; 3-state  
Rev. 7 — 4 March 2016  
Product data sheet  
1. General description  
The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The  
device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data  
at the inputs enter the latches. In this condition the latches are transparent, a latch output  
will change each time its corresponding D-input changes. When LE is LOW the latches  
store the information that was present at the inputs a set-up time preceding the  
HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a  
high-impedance OFF-state. Operation of the OE input does not affect the state of the  
latches. Inputs include clamp diodes. This enables the use of current limiting resistors to  
interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Input levels:  
For 74HC573: CMOS level  
For 74HCT573: TTL level  
Inputs and outputs on opposite sides of package allowing easy interface with  
microprocessors  
Useful as input or output port for microprocessors and microcomputers  
3-state non-inverting outputs for bus-oriented applications  
Common 3-state output enable input  
Multiple package options  
Complies with JEDEC standard no. 7 A  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Specified from 40 C to +85 C and from 40 C to +125 C  

74HC573BQ,115 替代型号

型号 品牌 替代类型 描述 数据表
74HC573BQ NEXPERIA

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