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74HC4060DB,118 PDF预览

74HC4060DB,118

更新时间: 2024-11-11 13:45:23
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
25页 135K
描述
74HC(T)4060 - 14-stage binary ripple counter with oscillator SSOP1 16-Pin

74HC4060DB,118 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:SSOP1包装说明:SSOP, SSOP16,.3
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.19
Is Samacsys:N其他特性:BUILT-IN OSCILLATOR
计数方向:UP系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:6.2 mm负载电容(CL):50 pF
负载/预设输入:NO逻辑集成电路类型:BINARY COUNTER
最大频率@ Nom-Sup:24000000 Hz最大I(ol):0.004 A
工作模式:ASYNCHRONOUS湿度敏感等级:1
位数:14功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/6 V传播延迟(tpd):90 ns
认证状态:Not Qualified座面最大高度:2 mm
子类别:Counters最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:NEGATIVE EDGE宽度:5.3 mm
最小 fmax:20 MHzBase Number Matches:1

74HC4060DB,118 数据手册

 浏览型号74HC4060DB,118的Datasheet PDF文件第2页浏览型号74HC4060DB,118的Datasheet PDF文件第3页浏览型号74HC4060DB,118的Datasheet PDF文件第4页浏览型号74HC4060DB,118的Datasheet PDF文件第5页浏览型号74HC4060DB,118的Datasheet PDF文件第6页浏览型号74HC4060DB,118的Datasheet PDF文件第7页 
74HC4060; 74HCT4060  
14-stage binary ripple counter with oscillator  
Rev. 03 — 14 July 2008  
Product data sheet  
1. General description  
The 74HC4060; 74HCT4060 are high-speed Si-gate CMOS device and is pin compatible  
with the HEF4060.  
The 74HC4060; 74HCT4060 are 14-stage ripple-carry counter/dividers and oscillators  
with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and  
Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator  
configuration allows design of either RC or crystal oscillator circuits. The oscillator may be  
replaced by an external clock signal at input RS. In this case keep the other oscillator pins  
(RTC and CTC) floating. The counter advances on the negative-going transition of RS. A  
HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of  
other input conditions. In the HCT version, the MR input is TTL compatible, but the RS  
input has CMOS input switching levels and can be driven by a TTL output by using a  
pull-up resistor to VCC  
.
2. Features  
I All active components on chip  
I RC or crystal oscillator configuration  
I Complies with JEDEC standard no. 7 A  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Applications  
I Control counters  
I Timers  
I Frequency dividers  
I Time-delay circuits  
 
 
 

74HC4060DB,118 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC4060DBRG4 TI

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