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74HC393-Q100 PDF预览

74HC393-Q100

更新时间: 2024-11-29 01:10:47
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
20页 734K
描述
Dual 4-bit binary ripple counter

74HC393-Q100 数据手册

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74HC393-Q100; 74HCT393-Q100  
Dual 4-bit binary ripple counter  
Rev. 1 — 19 June 2014  
Product data sheet  
1. General description  
The 74HC393-Q100; 7474HCT393-Q100 is a dual 4-stage binary ripple counter. Each  
counter features a clock input (nCP), an overriding asynchronous master reset input  
(nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the  
HIGH-to-LOW transition of nCP. A HIGH on nMR clears the counter stages and forces the  
outputs LOW, independent of the state of nCP. Inputs include clamp diodes. This enables  
the use of current limiting resistors to interface inputs to voltages in excess of VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Input levels:  
For 74HC393-Q100: CMOS level  
For 74HCT393-Q100: TTL level  
Complies with JEDEC standard no. 7A  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Two 4-bit binary counters with individual clocks  
Divide by any binary module up to 28 in one package  
Two master resets to clear each 4-bit counter individually  

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