Datasheet > 74HC377-Q100

74HC377-Q100

更新时间： 2024-11-29 01:10:15

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
18页	721K
描述
Octal D-type flip-flop with data enable; positive-edge trigger

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74HC377-Q100 数据手册

74HC377-Q100; 74HCT377-Q100

Octal D-type flip-flop with data enable; positive-edge trigger

Rev. 1 — 21 October 2013

Product data sheet

1. General description

The 74HC377-Q100; 74HCT377-Q100 is an octal positive-edge triggered D-type flip-flop.

The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs

Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time

requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one

set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs include

clamp diodes that enable the use of current limiting resistors to interface inputs to voltages

in excess of V_CC

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Input levels:

 For 74HC377-Q100: CMOS level

 For 74HCT377-Q100: TTL level

 Common clock and master reset

 Eight positive edge-triggered D-type flip-flops

 Complies with JEDEC standard no. 7A

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Multiple package options

 Specified from 40 C to +85 C and from 40 C to +125 C

12 3 4 5 6 7...18

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