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74HC32PW-Q100 PDF预览

74HC32PW-Q100

更新时间: 2024-10-29 01:10:15
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安世 - NEXPERIA /
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13页 229K
描述
Quad 2-input OR gate

74HC32PW-Q100 数据手册

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Nexperia  
74HC32-Q100; 74HCT32-Q100  
Quad 2-input OR gate  
5.2. Pin description  
Table 2. Pin description  
Symbol  
Pin  
Description  
data input  
1A to 4A  
1B to 4B  
1Y to 4Y  
GND  
1, 4, 9, 12  
2, 5, 10,13  
3, 6, 8, 11  
7
data input  
data output  
ground (0 V)  
supply voltage  
VCC  
14  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care.  
Input  
Output  
nA  
L
nB  
L
nY  
L
L
H
L
H
H
H
H
H
H
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Max  
+7  
Unit  
V
VCC  
IIK  
supply voltage  
-0.5  
input clamping current  
output clamping current  
output current  
VI < -0.5 V or VI > VCC + 0.5 V  
VO < -0.5 V or VO > VCC + 0.5 V  
-0.5 V < VO < VCC + 0.5 V  
[1]  
[1]  
-
±20  
±20  
±25  
50  
mA  
mA  
mA  
mA  
mA  
°C  
IOK  
IO  
-
-
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
-50  
-65  
-
-
storage temperature  
total power dissipation  
+150  
500  
[2]  
mW  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For SOT108-1 (SO14) packages: Ptot derates linearly with 10.1 mW/K above 100 °C.  
For SOT402-1 (TSSOP14) packages: Ptot derates linearly with 7.3 mW/K above 81 °C.  
For SOT762-1 (DHVQFN14) packages: Ptot derates linearly with 9.6 mW/K above 98 °C.  
©
74HC_HCT32_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 30 September 2019  
3 / 13  
 
 
 
 
 

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