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74HC32PW-T PDF预览

74HC32PW-T

更新时间: 2024-11-28 13:04:59
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
17页 138K
描述
IC HC/UH SERIES, QUAD 2-INPUT OR GATE, PDSO14, TSSOP-14, Gate

74HC32PW-T 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否无铅:不含铅
是否Rohs认证:符合生命周期:Transferred
零件包装代码:TSSOP包装说明:TSSOP,
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.04
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):135 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74HC32PW-T 数据手册

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74HC32; 74HCT32  
Quad 2-input OR gate  
Rev. 5 — 4 September 2012  
Product data sheet  
1. General description  
The 74HC32; 74HCT32 is a quad 2-input OR gate. Inputs include clamp diodes. This  
enables the use of current limiting resistors to interface inputs to voltages in excess of  
VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 V to 6.0 V  
Complies with JEDEC standard JESD7A  
Symmetrical output impedance  
High noise immunity  
Low power dissipation  
Balanced propagation delays  
Input levels:  
For 74HC32: CMOS level  
For 74HCT32: TTL level  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  

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