74HC32; 74HCT32
NXP Semiconductors
Quad 2-input OR gate
3. Ordering information
Table 1.
Type number Package
Temperature range Name
Ordering information
Description
Version
74HC32N
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
DIP14
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
74HCT32N
74HC32D
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HCT32D
74HC32DB
74HCT32DB
74HC32PW
74HCT32PW
74HC32BQ
74HCT32BQ
SSOP14
TSSOP14
DHVQFN14
plastic shrink small outline package; 14 leads; body SOT337-1
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
4. Functional diagram
1
2
≥1
≥1
≥1
≥1
3
6
4
5
1
2
1A
1B
1Y
2Y
3Y
3
6
8
4
5
2A
2B
9
8
10
9
3A
3B
10
A
B
12
13
12
13
4A
4B
4Y 11
11
Y
mna242
mna243
mna241
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one gate)
74HC_HCT32
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 September 2012
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