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74HC221D PDF预览

74HC221D

更新时间: 2024-01-30 12:21:54
品牌 Logo 应用领域
恩智浦 - NXP 振荡器预分频器多谐振动器逻辑集成电路光电二极管输入元件时钟
页数 文件大小 规格书
15页 254K
描述
Dual non-retriggerable monostable multivibrator with reset

74HC221D 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否无铅: 不含铅
是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.29其他特性:NON-RETRIGGERABLE; TRIGGERABLE FROM CLEAR INPUT ALSO
系列:HC/UHJESD-30 代码:R-PDIP-T16
长度:21.6 mm负载电容(CL):50 pF
逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR数据/时钟输入次数:2
功能数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE电源:2/6 V
传播延迟(tpd):54 ns认证状态:Not Qualified
座面最大高度:4.7 mm子类别:Prescaler/Multivibrators
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL/PALLADIUM/GOLD (NI/PD/AU)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm
Base Number Matches:1

74HC221D 数据手册

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Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
jitter-free triggering from inputs with slow transition rates,  
providing the circuit with excellent noise immunity.  
FEATURES  
Pulse width variance is typically less than ± 5%  
Pin-out identical to “123”  
Once triggered, the outputs (nQ, nQ) are independent of  
further transitions of nA and nB inputs and are a function  
of the timing components. The output pulses can be  
terminated by the overriding active LOW reset inputs  
(nRD). Input pulses may be of any duration relative to the  
output pulse.  
Overriding reset terminates output pulse  
nB inputs have hysteresis for improved noise immunity  
Output capability: standard (except for nREXT/CEXT  
ICC category: MSI  
)
Pulse width stability is achieved through internal  
compensation and is virtually independent of VCC and  
temperature. In most applications pulse stability will only  
be limited by the accuracy of the external timing  
components.  
GENERAL DESCRIPTION  
The 74HC/HCT221 are high-speed Si-gate CMOS devices  
and are pin compatible with low power Schottky TTL  
(LSTTL). They are specified in compliance with JEDEC  
standard no. 7A.  
The output pulse width is defined by the following  
relationship:  
The 74HC/HCT221 are dual non-retriggerable monostable  
multivibrators. Each multivibrator features an active  
LOW-going edge input (nA) and an active HIGH-going  
edge input (nB), either of which can be used as an enable  
input.  
tW = CEXTREXTIn2  
tW = 0.7CEXTREXT  
Pin assignments for the “221” are identical to those of the  
“123” so that the “221” can be substituted for those  
products in systems not using the retrigger by merely  
Pulse triggering occurs at a particular voltage level and is  
not directly related to the transition time of the input pulse.  
Schmitt-trigger input circuitry for the nB inputs allow  
changing the value of REXT and/or CEXT  
.
QUICK REFERENCE DATA  
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns  
TYPICAL  
HC HCT  
SYMBOL PARAMETER  
CONDITIONS  
UNIT  
propagation delay  
CL = 15 pF; VCC = 5 V;  
REXT = 5 k; CEXT = 0 pF  
tPHL  
tPLH  
CI  
nA, nB, nRD to nQ, nQ  
nA, nB, nRD to nQ, nQ  
input capacitance  
29  
35  
3.5  
90  
32  
36  
3.5  
96  
ns  
ns  
pF  
pF  
CPD  
power dissipation capacitance per package notes 1 and 2  
Notes  
1. CPD is used to determine the dynamic power dissipation (PD in µW):  
2
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) + 0.33 × CEXT × VCC × fo + D × 28 × VCC where:  
fi = input frequency in MHz; fo = output frequency in MHz  
(CL × VCC2 × fo) = sum of outputs  
CEXT = timing capacitance in pF; CL = output load capacitance in pF  
VCC = supply voltage in V; D = duty factor in %  
2. For HC the condition is VI = GND to VCC  
For HCT the condition is VI = GND to VCC 1.5 V  
December 1990  
2

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